
Michael Aaron Pratt
Examiner (ID: 7866, Phone: (571)272-2145 , Office: P/2914 )
| Most Active Art Unit | 2914 |
| Art Unit(s) | 2951, 2914 |
| Total Applications | 4747 |
| Issued Applications | 4588 |
| Pending Applications | 5 |
| Abandoned Applications | 161 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4300798
[patent_doc_number] => 06184539
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-02-06
[patent_title] => 'Static memory cell and method of forming static memory cell'
[patent_app_type] => 1
[patent_app_number] => 9/073074
[patent_app_country] => US
[patent_app_date] => 1998-05-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 20
[patent_no_of_words] => 9093
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/184/06184539.pdf
[firstpage_image] =>[orig_patent_app_number] => 073074
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/073074 | Static memory cell and method of forming static memory cell | May 3, 1998 | Issued |
Array
(
[id] => 4254822
[patent_doc_number] => 06222252
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-04-24
[patent_title] => 'Semiconductor substrate and method for producing the same'
[patent_app_type] => 1
[patent_app_number] => 9/069146
[patent_app_country] => US
[patent_app_date] => 1998-04-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 4228
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 35
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/222/06222252.pdf
[firstpage_image] =>[orig_patent_app_number] => 069146
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/069146 | Semiconductor substrate and method for producing the same | Apr 28, 1998 | Issued |
Array
(
[id] => 1587858
[patent_doc_number] => 06359319
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-03-19
[patent_title] => 'Static random access memory cell having pocket regions adjacent to sources of drive transistors'
[patent_app_type] => B1
[patent_app_number] => 09/065587
[patent_app_country] => US
[patent_app_date] => 1998-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 18
[patent_no_of_words] => 4045
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 164
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/359/06359319.pdf
[firstpage_image] =>[orig_patent_app_number] => 09065587
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/065587 | Static random access memory cell having pocket regions adjacent to sources of drive transistors | Apr 23, 1998 | Issued |
Array
(
[id] => 4253307
[patent_doc_number] => 06137152
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-10-24
[patent_title] => 'Planarized deep-shallow trench isolation for CMOS/bipolar devices'
[patent_app_type] => 1
[patent_app_number] => 9/064976
[patent_app_country] => US
[patent_app_date] => 1998-04-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 3268
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 217
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/137/06137152.pdf
[firstpage_image] =>[orig_patent_app_number] => 064976
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/064976 | Planarized deep-shallow trench isolation for CMOS/bipolar devices | Apr 21, 1998 | Issued |
Array
(
[id] => 6888519
[patent_doc_number] => 20010023974
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-09-27
[patent_title] => 'ELIMINATION OF WALKOUT IN HIGH VOLTAGE TRENCH ISOLATED DEVICES'
[patent_app_type] => new
[patent_app_number] => 09/063074
[patent_app_country] => US
[patent_app_date] => 1998-04-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 4810
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0023/20010023974.pdf
[firstpage_image] =>[orig_patent_app_number] => 09063074
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/063074 | Elimination of walkout in high voltage trench isolated devices | Apr 20, 1998 | Issued |
Array
(
[id] => 4222293
[patent_doc_number] => 06087674
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-07-11
[patent_title] => 'Memory element with memory material comprising phase-change material and dielectric material'
[patent_app_type] => 1
[patent_app_number] => 9/063174
[patent_app_country] => US
[patent_app_date] => 1998-04-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 8375
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/087/06087674.pdf
[firstpage_image] =>[orig_patent_app_number] => 063174
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/063174 | Memory element with memory material comprising phase-change material and dielectric material | Apr 19, 1998 | Issued |
Array
(
[id] => 7643582
[patent_doc_number] => 06429459
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-08-06
[patent_title] => 'Semiconductor component with foreign atoms introduced by ion implantation and process for producing the same'
[patent_app_type] => B1
[patent_app_number] => 09/051716
[patent_app_country] => US
[patent_app_date] => 1998-04-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 2976
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 13
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/429/06429459.pdf
[firstpage_image] =>[orig_patent_app_number] => 09051716
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/051716 | Semiconductor component with foreign atoms introduced by ion implantation and process for producing the same | Apr 16, 1998 | Issued |
Array
(
[id] => 4099697
[patent_doc_number] => 06066519
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-05-23
[patent_title] => 'Semiconductor device having an outgassed oxide layer and fabrication thereof'
[patent_app_type] => 1
[patent_app_number] => 9/061536
[patent_app_country] => US
[patent_app_date] => 1998-04-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3397
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 39
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/066/06066519.pdf
[firstpage_image] =>[orig_patent_app_number] => 061536
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/061536 | Semiconductor device having an outgassed oxide layer and fabrication thereof | Apr 15, 1998 | Issued |
Array
(
[id] => 3943991
[patent_doc_number] => 05973350
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-10-26
[patent_title] => 'Stacked capacitor structure for high density DRAM cells'
[patent_app_type] => 1
[patent_app_number] => 9/060565
[patent_app_country] => US
[patent_app_date] => 1998-04-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 11
[patent_no_of_words] => 2778
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 225
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/973/05973350.pdf
[firstpage_image] =>[orig_patent_app_number] => 060565
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/060565 | Stacked capacitor structure for high density DRAM cells | Apr 13, 1998 | Issued |
Array
(
[id] => 3929529
[patent_doc_number] => 05945724
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-08-31
[patent_title] => 'Trench isolation region for semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 9/058404
[patent_app_country] => US
[patent_app_date] => 1998-04-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 3809
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/945/05945724.pdf
[firstpage_image] =>[orig_patent_app_number] => 058404
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/058404 | Trench isolation region for semiconductor device | Apr 8, 1998 | Issued |
Array
(
[id] => 1534599
[patent_doc_number] => 06410964
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-06-25
[patent_title] => 'Semiconductor device capable of preventing gate oxide film from damage by plasma process and method of manufacturing the same'
[patent_app_type] => B1
[patent_app_number] => 09/050356
[patent_app_country] => US
[patent_app_date] => 1998-03-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 17
[patent_no_of_words] => 4704
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 54
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/410/06410964.pdf
[firstpage_image] =>[orig_patent_app_number] => 09050356
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/050356 | Semiconductor device capable of preventing gate oxide film from damage by plasma process and method of manufacturing the same | Mar 30, 1998 | Issued |
Array
(
[id] => 4243986
[patent_doc_number] => 06081019
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-06-27
[patent_title] => 'Semiconductor diode with suppression of auger generation processes'
[patent_app_type] => 1
[patent_app_number] => 9/043995
[patent_app_country] => US
[patent_app_date] => 1998-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 2514
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 153
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/081/06081019.pdf
[firstpage_image] =>[orig_patent_app_number] => 043995
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/043995 | Semiconductor diode with suppression of auger generation processes | Mar 29, 1998 | Issued |
Array
(
[id] => 4137902
[patent_doc_number] => 06147407
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-11-14
[patent_title] => 'Article comprising fluorinated amorphous carbon and process for fabricating article'
[patent_app_type] => 1
[patent_app_number] => 9/049256
[patent_app_country] => US
[patent_app_date] => 1998-03-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 12
[patent_no_of_words] => 6292
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 78
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/147/06147407.pdf
[firstpage_image] =>[orig_patent_app_number] => 049256
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/049256 | Article comprising fluorinated amorphous carbon and process for fabricating article | Mar 26, 1998 | Issued |
Array
(
[id] => 4184312
[patent_doc_number] => 06037653
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-03-14
[patent_title] => 'Semiconductor lead frame having multi-layered plating layer including copper-nickel plating layer'
[patent_app_type] => 1
[patent_app_number] => 9/046656
[patent_app_country] => US
[patent_app_date] => 1998-03-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 2751
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 64
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/037/06037653.pdf
[firstpage_image] =>[orig_patent_app_number] => 046656
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/046656 | Semiconductor lead frame having multi-layered plating layer including copper-nickel plating layer | Mar 23, 1998 | Issued |
Array
(
[id] => 4317511
[patent_doc_number] => 06316784
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-11-13
[patent_title] => 'Method of making chalcogenide memory device'
[patent_app_type] => 1
[patent_app_number] => 9/041546
[patent_app_country] => US
[patent_app_date] => 1998-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 38
[patent_figures_cnt] => 48
[patent_no_of_words] => 9572
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 60
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/316/06316784.pdf
[firstpage_image] =>[orig_patent_app_number] => 041546
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/041546 | Method of making chalcogenide memory device | Mar 11, 1998 | Issued |
| 09/035204 | SILICON CARBIDE SEMICONDUCTOR DEVICE | Mar 4, 1998 | Abandoned |
Array
(
[id] => 4179645
[patent_doc_number] => 06084266
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-07-04
[patent_title] => 'Layout of semiconductor devices to increase the packing density of a wafer'
[patent_app_type] => 1
[patent_app_number] => 9/033944
[patent_app_country] => US
[patent_app_date] => 1998-03-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 1611
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 174
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/084/06084266.pdf
[firstpage_image] =>[orig_patent_app_number] => 033944
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/033944 | Layout of semiconductor devices to increase the packing density of a wafer | Mar 1, 1998 | Issued |
| 09/031260 | CONDUCTING STRUCTURE FOR A DRAM CELL | Feb 25, 1998 | Abandoned |
Array
(
[id] => 3929261
[patent_doc_number] => 05945706
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-08-31
[patent_title] => 'Memory device'
[patent_app_type] => 1
[patent_app_number] => 9/030206
[patent_app_country] => US
[patent_app_date] => 1998-02-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 43
[patent_no_of_words] => 11264
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/945/05945706.pdf
[firstpage_image] =>[orig_patent_app_number] => 030206
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/030206 | Memory device | Feb 24, 1998 | Issued |
Array
(
[id] => 4319584
[patent_doc_number] => 06242775
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-06-05
[patent_title] => 'Circuits and methods using vertical complementary transistors'
[patent_app_type] => 1
[patent_app_number] => 9/028805
[patent_app_country] => US
[patent_app_date] => 1998-02-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 17
[patent_no_of_words] => 5809
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/242/06242775.pdf
[firstpage_image] =>[orig_patent_app_number] => 028805
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/028805 | Circuits and methods using vertical complementary transistors | Feb 23, 1998 | Issued |