Michael Aaron Pratt

Array ( [id] => 6237470 [patent_doc_number] => 20020043678 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-04-18 [patent_title] => 'SEMICONDUCTOR INTEGRATED DEVICE AND METHOD OF FABRICATION THEROF' [patent_app_type] => new [patent_app_number] => 08/964457 [patent_app_country] => US [patent_app_date] => 1997-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7706 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0043/20020043678.pdf [firstpage_image] =>[orig_patent_app_number] => 08964457 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4041877 [patent_doc_number] => 05856698 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-05 [patent_title] => 'Second implanted matrix for agglomeration control and thermal stability' [patent_app_type] => 1 [patent_app_number] => 8/959238 [patent_app_country] => US [patent_app_date] => 1997-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 2589 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/856/05856698.pdf [firstpage_image] =>[orig_patent_app_number] => 959238 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4105034 [patent_doc_number] => 06066872 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-23 [patent_title] => 'Semiconductor device and its fabricating method' [patent_app_type] => 1 [patent_app_number] => 8/959330 [patent_app_country] => US [patent_app_date] => 1997-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 114 [patent_figures_cnt] => 253 [patent_no_of_words] => 45234 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/066/06066872.pdf [firstpage_image] =>[orig_patent_app_number] => 959330 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4105233 [patent_doc_number] => 06066886 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-23 [patent_title] => 'Semiconductor wafer in which redundant memory portion is shared by two neighboring semiconductor memory portions and is connected to the semiconductor memory portions' [patent_app_type] => 1 [patent_app_number] => 8/958486 [patent_app_country] => US [patent_app_date] => 1997-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 20 [patent_no_of_words] => 4279 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/066/06066886.pdf [firstpage_image] =>[orig_patent_app_number] => 958486 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4075670 [patent_doc_number] => 06069369 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-30 [patent_title] => 'Superconducting device' [patent_app_type] => 1 [patent_app_number] => 8/957732 [patent_app_country] => US [patent_app_date] => 1997-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 16 [patent_no_of_words] => 9956 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/069/06069369.pdf [firstpage_image] =>[orig_patent_app_number] => 957732 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3931564 [patent_doc_number] => 05952679 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-14 [patent_title] => 'Semiconductor substrate and method for straightening warp of semiconductor substrate' [patent_app_type] => 1 [patent_app_number] => 8/951646 [patent_app_country] => US [patent_app_date] => 1997-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 17 [patent_no_of_words] => 4151 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/952/05952679.pdf [firstpage_image] =>[orig_patent_app_number] => 951646 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4387168 [patent_doc_number] => 06294804 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-25 [patent_title] => 'GaAs single crystal as well as method of producing the same, and semiconductor device utilizing the GaAs single crystal' [patent_app_type] => 1 [patent_app_number] => 8/943593 [patent_app_country] => US [patent_app_date] => 1997-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2835 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/294/06294804.pdf [firstpage_image] =>[orig_patent_app_number] => 943593 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4385331 [patent_doc_number] => RE037424 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-30 [patent_title] => 'Mixed technology integrated device comprising complementary LDMOS power transistors, CMOS and vertical PNP integrated structures having an enhanced ability to withstand a relatively high supply voltage' [patent_app_type] => 2 [patent_app_number] => 8/943326 [patent_app_country] => US [patent_app_date] => 1997-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2619 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/RE/037/RE037424.pdf [firstpage_image] =>[orig_patent_app_number] => 943326 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3954301 [patent_doc_number] => 05955748 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-21 [patent_title] => 'End face light emitting type light emitting diode' [patent_app_type] => 1 [patent_app_number] => 8/942302 [patent_app_country] => US [patent_app_date] => 1997-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 39 [patent_no_of_words] => 9017 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/955/05955748.pdf [firstpage_image] =>[orig_patent_app_number] => 942302 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4017299 [patent_doc_number] => 05962911 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-05 [patent_title] => 'Semiconductor devices having amorphous silicon antifuse structures' [patent_app_type] => 1 [patent_app_number] => 8/941512 [patent_app_country] => US [patent_app_date] => 1997-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 4685 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 307 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/962/05962911.pdf [firstpage_image] =>[orig_patent_app_number] => 941512 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4026732 [patent_doc_number] => 05925893 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-20 [patent_title] => 'Semiconductive member and production method thereof' [patent_app_type] => 1 [patent_app_number] => 8/881492 [patent_app_country] => US [patent_app_date] => 1997-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 18489 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/925/05925893.pdf [firstpage_image] =>[orig_patent_app_number] => 881492 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4016922 [patent_doc_number] => 05962885 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-05 [patent_title] => 'Method of forming a capacitor and a capacitor construction' [patent_app_type] => 1 [patent_app_number] => 8/935966 [patent_app_country] => US [patent_app_date] => 1997-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 1858 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/962/05962885.pdf [firstpage_image] =>[orig_patent_app_number] => 935966 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3903755 [patent_doc_number] => 05751039 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-12 [patent_title] => 'Programmable non-volatile memory cell and method of forming a non-volatile memory cell' [patent_app_type] => 1 [patent_app_number] => 8/934439 [patent_app_country] => US [patent_app_date] => 1997-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 3325 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/751/05751039.pdf [firstpage_image] =>[orig_patent_app_number] => 934439 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4062076 [patent_doc_number] => 05864156 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-26 [patent_title] => 'Isolated plugged contacts' [patent_app_type] => 1 [patent_app_number] => 8/931822 [patent_app_country] => US [patent_app_date] => 1997-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4527 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/864/05864156.pdf [firstpage_image] =>[orig_patent_app_number] => 931822 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4019608 [patent_doc_number] => 05880485 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-09 [patent_title] => 'Semiconductor device including Gallium nitride layer' [patent_app_type] => 1 [patent_app_number] => 8/927692 [patent_app_country] => US [patent_app_date] => 1997-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 22 [patent_no_of_words] => 6310 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/880/05880485.pdf [firstpage_image] =>[orig_patent_app_number] => 927692 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4003002 [patent_doc_number] => 05986328 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-16 [patent_title] => 'Buried contact architecture' [patent_app_type] => 1 [patent_app_number] => 8/926694 [patent_app_country] => US [patent_app_date] => 1997-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 2348 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/986/05986328.pdf [firstpage_image] =>[orig_patent_app_number] => 926694 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3980546 [patent_doc_number] => 05917217 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-29 [patent_title] => 'Lateral field effect transistor and method of manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 8/926343 [patent_app_country] => US [patent_app_date] => 1997-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 4111 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 267 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/917/05917217.pdf [firstpage_image] =>[orig_patent_app_number] => 926343 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4196424 [patent_doc_number] => 06130464 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-10 [patent_title] => 'Latching microaccelerometer' [patent_app_type] => 1 [patent_app_number] => 8/925202 [patent_app_country] => US [patent_app_date] => 1997-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 17 [patent_no_of_words] => 4394 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/130/06130464.pdf [firstpage_image] =>[orig_patent_app_number] => 925202 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1347167 [patent_doc_number] => 06586806 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-01 [patent_title] => 'Method and structure for a single-sided non-self-aligned transistor' [patent_app_type] => B1 [patent_app_number] => 08/929308 [patent_app_country] => US [patent_app_date] => 1997-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3321 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/586/06586806.pdf [firstpage_image] =>[orig_patent_app_number] => 08929308 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4111370 [patent_doc_number] => 06023086 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-08 [patent_title] => 'Semiconductor transistor with stabilizing gate electrode' [patent_app_type] => 1 [patent_app_number] => 8/926078 [patent_app_country] => US [patent_app_date] => 1997-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2429 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/023/06023086.pdf [firstpage_image] =>[orig_patent_app_number] => 926078 [rel_patent_id] =>[rel_patent_doc_number] =>)