Search

Michael Aaron Pratt

Examiner (ID: 7866, Phone: (571)272-2145 , Office: P/2914 )

Most Active Art Unit
2914
Art Unit(s)
2951, 2914
Total Applications
4747
Issued Applications
4588
Pending Applications
5
Abandoned Applications
161

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3891908 [patent_doc_number] => 05894135 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-13 [patent_title] => 'Superconductor device' [patent_app_type] => 1 [patent_app_number] => 8/732848 [patent_app_country] => US [patent_app_date] => 1996-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 6686 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/894/05894135.pdf [firstpage_image] =>[orig_patent_app_number] => 732848 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/732848
Superconductor device Oct 14, 1996 Issued
Array ( [id] => 3852435 [patent_doc_number] => 05719406 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-17 [patent_title] => 'Field emission device having a charge bleed-off barrier' [patent_app_type] => 1 [patent_app_number] => 8/727686 [patent_app_country] => US [patent_app_date] => 1996-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 2720 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/719/05719406.pdf [firstpage_image] =>[orig_patent_app_number] => 727686 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/727686
Field emission device having a charge bleed-off barrier Oct 7, 1996 Issued
Array ( [id] => 3782239 [patent_doc_number] => 05818099 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-06 [patent_title] => 'MOS high frequency switch circuit using a variable well bias' [patent_app_type] => 1 [patent_app_number] => 8/724876 [patent_app_country] => US [patent_app_date] => 1996-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3643 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/818/05818099.pdf [firstpage_image] =>[orig_patent_app_number] => 724876 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/724876
MOS high frequency switch circuit using a variable well bias Oct 2, 1996 Issued
Array ( [id] => 3874425 [patent_doc_number] => 05838041 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-17 [patent_title] => 'Nonvolatile semiconductor memory device having memory cell transistor provided with offset region acting as a charge carrier injecting region' [patent_app_type] => 1 [patent_app_number] => 8/720618 [patent_app_country] => US [patent_app_date] => 1996-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 19 [patent_no_of_words] => 5963 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/838/05838041.pdf [firstpage_image] =>[orig_patent_app_number] => 720618 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/720618
Nonvolatile semiconductor memory device having memory cell transistor provided with offset region acting as a charge carrier injecting region Oct 1, 1996 Issued
Array ( [id] => 3917916 [patent_doc_number] => 06002142 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-14 [patent_title] => 'Integrated optoelectronic structures incorporating P-type and N-type layer disordered regions' [patent_app_type] => 1 [patent_app_number] => 8/724620 [patent_app_country] => US [patent_app_date] => 1996-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 31 [patent_no_of_words] => 7965 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/002/06002142.pdf [firstpage_image] =>[orig_patent_app_number] => 724620 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/724620
Integrated optoelectronic structures incorporating P-type and N-type layer disordered regions Sep 29, 1996 Issued
Array ( [id] => 3864761 [patent_doc_number] => 05793084 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-11 [patent_title] => 'Transistor for providing protection from electrostatic discharge' [patent_app_type] => 1 [patent_app_number] => 8/721796 [patent_app_country] => US [patent_app_date] => 1996-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 1262 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/793/05793084.pdf [firstpage_image] =>[orig_patent_app_number] => 721796 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/721796
Transistor for providing protection from electrostatic discharge Sep 25, 1996 Issued
Array ( [id] => 3753413 [patent_doc_number] => 05851440 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-22 [patent_title] => 'Semiconductor device and liquid crystal display apparatus using the same' [patent_app_type] => 1 [patent_app_number] => 8/717236 [patent_app_country] => US [patent_app_date] => 1996-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 8154 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/851/05851440.pdf [firstpage_image] =>[orig_patent_app_number] => 717236 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/717236
Semiconductor device and liquid crystal display apparatus using the same Sep 19, 1996 Issued
Array ( [id] => 3943243 [patent_doc_number] => 05976912 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-02 [patent_title] => 'Fabrication process of semiconductor package and semiconductor package' [patent_app_type] => 1 [patent_app_number] => 8/716362 [patent_app_country] => US [patent_app_date] => 1996-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 134 [patent_no_of_words] => 15512 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/976/05976912.pdf [firstpage_image] =>[orig_patent_app_number] => 716362 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/716362
Fabrication process of semiconductor package and semiconductor package Sep 17, 1996 Issued
Array ( [id] => 3780226 [patent_doc_number] => 05757054 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-26 [patent_title] => 'Display unit' [patent_app_type] => 1 [patent_app_number] => 8/714439 [patent_app_country] => US [patent_app_date] => 1996-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 5277 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/757/05757054.pdf [firstpage_image] =>[orig_patent_app_number] => 714439 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/714439
Display unit Sep 15, 1996 Issued
Array ( [id] => 3774252 [patent_doc_number] => 05734186 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-31 [patent_title] => 'CMOS voltage clamp' [patent_app_type] => 1 [patent_app_number] => 8/715284 [patent_app_country] => US [patent_app_date] => 1996-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 3909 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/734/05734186.pdf [firstpage_image] =>[orig_patent_app_number] => 715284 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/715284
CMOS voltage clamp Sep 15, 1996 Issued
Array ( [id] => 4243833 [patent_doc_number] => 06166409 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-26 [patent_title] => 'Flash EPROM memory cell having increased capacitive coupling' [patent_app_type] => 1 [patent_app_number] => 8/713292 [patent_app_country] => US [patent_app_date] => 1996-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 45 [patent_no_of_words] => 5521 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/166/06166409.pdf [firstpage_image] =>[orig_patent_app_number] => 713292 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/713292
Flash EPROM memory cell having increased capacitive coupling Sep 12, 1996 Issued
Array ( [id] => 3821342 [patent_doc_number] => 05770881 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-23 [patent_title] => 'SOI FET design to reduce transient bipolar current' [patent_app_type] => 1 [patent_app_number] => 8/712538 [patent_app_country] => US [patent_app_date] => 1996-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 6574 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/770/05770881.pdf [firstpage_image] =>[orig_patent_app_number] => 712538 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/712538
SOI FET design to reduce transient bipolar current Sep 11, 1996 Issued
Array ( [id] => 4056068 [patent_doc_number] => 05969393 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-19 [patent_title] => 'Semiconductor device and method of manufacture of the same' [patent_app_type] => 1 [patent_app_number] => 8/712650 [patent_app_country] => US [patent_app_date] => 1996-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 37 [patent_no_of_words] => 9715 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/969/05969393.pdf [firstpage_image] =>[orig_patent_app_number] => 712650 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/712650
Semiconductor device and method of manufacture of the same Sep 10, 1996 Issued
Array ( [id] => 3931701 [patent_doc_number] => 05952689 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-14 [patent_title] => 'Semiconductor memory device having tree-type capacitor' [patent_app_type] => 1 [patent_app_number] => 8/706732 [patent_app_country] => US [patent_app_date] => 1996-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 46 [patent_no_of_words] => 11077 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 278 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/952/05952689.pdf [firstpage_image] =>[orig_patent_app_number] => 706732 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/706732
Semiconductor memory device having tree-type capacitor Sep 5, 1996 Issued
Array ( [id] => 4019592 [patent_doc_number] => 05880484 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-09 [patent_title] => 'Lateral resonant tunneling transistor having two non-symmetric quantum dots' [patent_app_type] => 1 [patent_app_number] => 8/706238 [patent_app_country] => US [patent_app_date] => 1996-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2641 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/880/05880484.pdf [firstpage_image] =>[orig_patent_app_number] => 706238 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/706238
Lateral resonant tunneling transistor having two non-symmetric quantum dots Sep 3, 1996 Issued
Array ( [id] => 3926707 [patent_doc_number] => 05914505 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-22 [patent_title] => 'Semiconductor integrated circuit' [patent_app_type] => 1 [patent_app_number] => 8/706394 [patent_app_country] => US [patent_app_date] => 1996-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 8170 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/914/05914505.pdf [firstpage_image] =>[orig_patent_app_number] => 706394 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/706394
Semiconductor integrated circuit Aug 29, 1996 Issued
08/697708 BODY CONTACT FOR A MOSFET DEVICE FABRICATED IN AN SOI LAYER Aug 27, 1996 Abandoned
Array ( [id] => 4162462 [patent_doc_number] => 06157045 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-05 [patent_title] => 'Semiconductor device evaluation pattern and evaluation method' [patent_app_type] => 1 [patent_app_number] => 8/702176 [patent_app_country] => US [patent_app_date] => 1996-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 2626 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/157/06157045.pdf [firstpage_image] =>[orig_patent_app_number] => 702176 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/702176
Semiconductor device evaluation pattern and evaluation method Aug 22, 1996 Issued
Array ( [id] => 4069958 [patent_doc_number] => 05866930 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-02 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 8/697448 [patent_app_country] => US [patent_app_date] => 1996-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 58 [patent_no_of_words] => 10433 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/866/05866930.pdf [firstpage_image] =>[orig_patent_app_number] => 697448 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/697448
Semiconductor device and method of manufacturing the same Aug 22, 1996 Issued
08/702736 NON-VOLATILE MEMORY ARRAYS Aug 22, 1996 Abandoned
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