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Michael B. Pallay

Examiner (ID: 12883, Phone: (571)270-3473 , Office: P/1617 )

Most Active Art Unit
1617
Art Unit(s)
1617
Total Applications
880
Issued Applications
429
Pending Applications
109
Abandoned Applications
374

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9071035 [patent_doc_number] => 20130262791 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-03 [patent_title] => 'HOST-SIDE SUPPORT OF DYNAMICALLY CHANGING FREQUENCY IN MEMORY SYSTEMS' [patent_app_type] => utility [patent_app_number] => 13/430807 [patent_app_country] => US [patent_app_date] => 2012-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5370 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13430807 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/430807
HOST-SIDE SUPPORT OF DYNAMICALLY CHANGING FREQUENCY IN MEMORY SYSTEMS Mar 26, 2012 Abandoned
Array ( [id] => 11232780 [patent_doc_number] => 09460009 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-10-04 [patent_title] => 'Logical unit creation in data storage system' [patent_app_type] => utility [patent_app_number] => 13/429883 [patent_app_country] => US [patent_app_date] => 2012-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4454 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 344 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13429883 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/429883
Logical unit creation in data storage system Mar 25, 2012 Issued
Array ( [id] => 8395547 [patent_doc_number] => 20120233383 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-13 [patent_title] => 'MEMORY SYSTEM AND MEMORY CONTROLLER' [patent_app_type] => utility [patent_app_number] => 13/367655 [patent_app_country] => US [patent_app_date] => 2012-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 17552 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13367655 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/367655
Memory system and memory controller Feb 6, 2012 Issued
Array ( [id] => 8965486 [patent_doc_number] => 20130205088 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-08 [patent_title] => 'MULTI-STAGE CACHE DIRECTORY AND VARIABLE CACHE-LINE SIZE FOR TIERED STORAGE ARCHITECTURES' [patent_app_type] => utility [patent_app_number] => 13/367155 [patent_app_country] => US [patent_app_date] => 2012-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6823 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13367155 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/367155
MULTI-STAGE CACHE DIRECTORY AND VARIABLE CACHE-LINE SIZE FOR TIERED STORAGE ARCHITECTURES Feb 5, 2012 Abandoned
Array ( [id] => 8965478 [patent_doc_number] => 20130205080 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-08 [patent_title] => 'APPARATUS AND METHOD FOR CONTROLLING REFRESHING OF DATA IN A DRAM' [patent_app_type] => utility [patent_app_number] => 13/366660 [patent_app_country] => US [patent_app_date] => 2012-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7074 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13366660 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/366660
Apparatus and method for controlling refreshing of data in a DRAM Feb 5, 2012 Issued
Array ( [id] => 8965464 [patent_doc_number] => 20130205066 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-08 [patent_title] => 'ENHANCED WRITE ABORT MANAGEMENT IN FLASH MEMORY' [patent_app_type] => utility [patent_app_number] => 13/365595 [patent_app_country] => US [patent_app_date] => 2012-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5561 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13365595 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/365595
ENHANCED WRITE ABORT MANAGEMENT IN FLASH MEMORY Feb 2, 2012 Abandoned
Array ( [id] => 8965463 [patent_doc_number] => 20130205065 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-08 [patent_title] => 'METHODS AND STRUCTURE FOR AN IMPROVED SOLID-STATE DRIVE FOR USE IN CACHING APPLICATIONS' [patent_app_type] => utility [patent_app_number] => 13/365050 [patent_app_country] => US [patent_app_date] => 2012-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3609 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13365050 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/365050
METHODS AND STRUCTURE FOR AN IMPROVED SOLID-STATE DRIVE FOR USE IN CACHING APPLICATIONS Feb 1, 2012 Abandoned
Array ( [id] => 8918023 [patent_doc_number] => 20130179648 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-11 [patent_title] => 'MANAGEMENT APPARATUS AND MANAGEMENT METHOD FOR COMPUTER SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/574959 [patent_app_country] => US [patent_app_date] => 2012-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 37 [patent_no_of_words] => 19398 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13574959 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/574959
MANAGEMENT APPARATUS AND MANAGEMENT METHOD FOR COMPUTER SYSTEM Jan 4, 2012 Abandoned
Array ( [id] => 9207539 [patent_doc_number] => 20140006716 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-02 [patent_title] => 'DATA CONTROL USING LAST ACCESSOR INFORMATION' [patent_app_type] => utility [patent_app_number] => 13/993779 [patent_app_country] => US [patent_app_date] => 2011-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7860 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13993779 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/993779
DATA CONTROL USING LAST ACCESSOR INFORMATION Dec 28, 2011 Abandoned
Array ( [id] => 9270951 [patent_doc_number] => 20140025869 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-23 [patent_title] => 'METHOD AND SYSTEM FOR IMPROVING A CONTROL OF A LIMIT ON WRITING CYCLES OF AN IC CARD' [patent_app_type] => utility [patent_app_number] => 13/976686 [patent_app_country] => US [patent_app_date] => 2011-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3206 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13976686 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/976686
METHOD AND SYSTEM FOR IMPROVING A CONTROL OF A LIMIT ON WRITING CYCLES OF AN IC CARD Dec 22, 2011 Abandoned
Array ( [id] => 8395591 [patent_doc_number] => 20120233431 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-13 [patent_title] => 'RELAY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/509270 [patent_app_country] => US [patent_app_date] => 2010-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9400 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13509270 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/509270
RELAY DEVICE Aug 24, 2010 Abandoned
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