Search

Michael B. Shingleton

Examiner (ID: 10496, Phone: (571)272-1770 , Office: P/2815 )

Most Active Art Unit
2817
Art Unit(s)
2502, 2821, 2815, 2817
Total Applications
2168
Issued Applications
1706
Pending Applications
83
Abandoned Applications
382

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5718937 [patent_doc_number] => 20060071710 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-06 [patent_title] => 'Auto gain controller' [patent_app_type] => utility [patent_app_number] => 10/956057 [patent_app_country] => US [patent_app_date] => 2004-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2675 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0071/20060071710.pdf [firstpage_image] =>[orig_patent_app_number] => 10956057 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/956057
Auto gain controller Oct 3, 2004 Issued
Array ( [id] => 7101406 [patent_doc_number] => 20050104132 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-19 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 10/956774 [patent_app_country] => US [patent_app_date] => 2004-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7841 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0104/20050104132.pdf [firstpage_image] =>[orig_patent_app_number] => 10956774 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/956774
Semiconductor device and manufacturing method thereof Sep 30, 2004 Abandoned
Array ( [id] => 5635434 [patent_doc_number] => 20060066407 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-30 [patent_title] => 'Amplification gain stages having replica stages for DC bias control' [patent_app_type] => utility [patent_app_number] => 10/953178 [patent_app_country] => US [patent_app_date] => 2004-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3479 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0066/20060066407.pdf [firstpage_image] =>[orig_patent_app_number] => 10953178 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/953178
Amplification gain stages having replica stages for DC bias control Sep 29, 2004 Issued
Array ( [id] => 5635435 [patent_doc_number] => 20060066408 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-30 [patent_title] => 'Base current compensation circuit for a bipolar junction transistor' [patent_app_type] => utility [patent_app_number] => 10/953897 [patent_app_country] => US [patent_app_date] => 2004-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4275 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0066/20060066408.pdf [firstpage_image] =>[orig_patent_app_number] => 10953897 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/953897
Base current compensation circuit for a bipolar junction transistor Sep 28, 2004 Issued
Array ( [id] => 514053 [patent_doc_number] => 07199665 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-03 [patent_title] => 'Single to dual non-overlapping converter' [patent_app_type] => utility [patent_app_number] => 10/954127 [patent_app_country] => US [patent_app_date] => 2004-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6025 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/199/07199665.pdf [firstpage_image] =>[orig_patent_app_number] => 10954127 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/954127
Single to dual non-overlapping converter Sep 28, 2004 Issued
Array ( [id] => 5635421 [patent_doc_number] => 20060066394 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-30 [patent_title] => 'Characterizing linearity of amplifiers' [patent_app_type] => utility [patent_app_number] => 10/953892 [patent_app_country] => US [patent_app_date] => 2004-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6285 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0066/20060066394.pdf [firstpage_image] =>[orig_patent_app_number] => 10953892 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/953892
Characterizing linearity of amplifiers Sep 28, 2004 Issued
Array ( [id] => 5744302 [patent_doc_number] => 20060090028 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-27 [patent_title] => 'Passive differential voltage-to-charge sample-and-hold device' [patent_app_type] => utility [patent_app_number] => 10/952454 [patent_app_country] => US [patent_app_date] => 2004-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7275 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0090/20060090028.pdf [firstpage_image] =>[orig_patent_app_number] => 10952454 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/952454
Passive differential voltage-to-charge sample-and-hold device Sep 26, 2004 Abandoned
10/949509 Multi-stage power amplifier with enhanced efficiency Sep 23, 2004 Abandoned
Array ( [id] => 7101943 [patent_doc_number] => 20050104669 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-19 [patent_title] => 'Two-point modulator arrangement' [patent_app_type] => utility [patent_app_number] => 10/947847 [patent_app_country] => US [patent_app_date] => 2004-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2790 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0104/20050104669.pdf [firstpage_image] =>[orig_patent_app_number] => 10947847 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/947847
Two-point modulator arrangement Sep 22, 2004 Issued
Array ( [id] => 7095545 [patent_doc_number] => 20050128003 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-16 [patent_title] => 'Transistor assembly' [patent_app_type] => utility [patent_app_number] => 10/943492 [patent_app_country] => US [patent_app_date] => 2004-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3580 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20050128003.pdf [firstpage_image] =>[orig_patent_app_number] => 10943492 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/943492
Transistor assembly Sep 16, 2004 Abandoned
Array ( [id] => 5152017 [patent_doc_number] => 20070034899 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-15 [patent_title] => 'Silicon-on-insulator photodiode optical monitoring system for color temperature control in solid state light systems' [patent_app_type] => utility [patent_app_number] => 10/572611 [patent_app_country] => US [patent_app_date] => 2004-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2570 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0034/20070034899.pdf [firstpage_image] =>[orig_patent_app_number] => 10572611 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/572611
Silicon-on-insulator photodiode optical monitoring system for color temperature control in solid state light systems Sep 14, 2004 Abandoned
Array ( [id] => 646795 [patent_doc_number] => 07119616 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-10-10 [patent_title] => 'Method and apparatus for a fully differential amplifier output stage' [patent_app_type] => utility [patent_app_number] => 10/940119 [patent_app_country] => US [patent_app_date] => 2004-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7380 [patent_no_of_claims] => 58 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 509 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/119/07119616.pdf [firstpage_image] =>[orig_patent_app_number] => 10940119 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/940119
Method and apparatus for a fully differential amplifier output stage Sep 13, 2004 Issued
Array ( [id] => 527948 [patent_doc_number] => 07187236 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-03-06 [patent_title] => 'Rail-to-rail differential input amplification stage with main and surrogate differential pairs' [patent_app_type] => utility [patent_app_number] => 10/935525 [patent_app_country] => US [patent_app_date] => 2004-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3063 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/187/07187236.pdf [firstpage_image] =>[orig_patent_app_number] => 10935525 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/935525
Rail-to-rail differential input amplification stage with main and surrogate differential pairs Sep 6, 2004 Issued
Array ( [id] => 5899111 [patent_doc_number] => 20060044069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-02 [patent_title] => 'Single-ended pseudo-differential output driver' [patent_app_type] => utility [patent_app_number] => 10/931362 [patent_app_country] => US [patent_app_date] => 2004-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3080 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0044/20060044069.pdf [firstpage_image] =>[orig_patent_app_number] => 10931362 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/931362
Single-ended pseudo-differential output driver Aug 30, 2004 Issued
Array ( [id] => 7222814 [patent_doc_number] => 20050077972 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-14 [patent_title] => 'Circuit arrangement for generating a reference current and oscillator circuit having the circuit arrangement' [patent_app_type] => utility [patent_app_number] => 10/931173 [patent_app_country] => US [patent_app_date] => 2004-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4856 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0077/20050077972.pdf [firstpage_image] =>[orig_patent_app_number] => 10931173 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/931173
Circuit arrangement for generating a reference current and oscillator circuit having the circuit arrangement Aug 30, 2004 Issued
Array ( [id] => 7149115 [patent_doc_number] => 20050024144 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-03 [patent_title] => 'Programmable gain amplifier with glitch minimization' [patent_app_type] => utility [patent_app_number] => 10/928371 [patent_app_country] => US [patent_app_date] => 2004-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6705 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0024/20050024144.pdf [firstpage_image] =>[orig_patent_app_number] => 10928371 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/928371
Programmable gain amplifier with glitch minimization Aug 29, 2004 Issued
10/921066 Parasitic impedance estimation in circuit layout Aug 17, 2004 Abandoned
Array ( [id] => 7081120 [patent_doc_number] => 20050046500 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-03 [patent_title] => 'Tunable frequency, low phase noise and low thermal drift oscillator' [patent_app_type] => utility [patent_app_number] => 10/912209 [patent_app_country] => US [patent_app_date] => 2004-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6370 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0046/20050046500.pdf [firstpage_image] =>[orig_patent_app_number] => 10912209 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/912209
Tunable frequency, low phase noise and low thermal drift oscillator Aug 4, 2004 Issued
Array ( [id] => 7614799 [patent_doc_number] => 06897729 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-05-24 [patent_title] => 'Self-calibrating gain control circuit for low noise amplifier' [patent_app_type] => utility [patent_app_number] => 10/889643 [patent_app_country] => US [patent_app_date] => 2004-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3024 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/897/06897729.pdf [firstpage_image] =>[orig_patent_app_number] => 10889643 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/889643
Self-calibrating gain control circuit for low noise amplifier Jul 11, 2004 Issued
Array ( [id] => 656268 [patent_doc_number] => 07109791 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-09-19 [patent_title] => 'Tailored collector voltage to minimize variation in AM to PM distortion in a power amplifier' [patent_app_type] => utility [patent_app_number] => 10/887744 [patent_app_country] => US [patent_app_date] => 2004-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 6076 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/109/07109791.pdf [firstpage_image] =>[orig_patent_app_number] => 10887744 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/887744
Tailored collector voltage to minimize variation in AM to PM distortion in a power amplifier Jul 8, 2004 Issued
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