
Michael Bernshteyn
Examiner (ID: 11766, Phone: (571)272-2411 , Office: P/1762 )
| Most Active Art Unit | 1762 |
| Art Unit(s) | 1762, 1764, 1796, 1713 |
| Total Applications | 1884 |
| Issued Applications | 1528 |
| Pending Applications | 44 |
| Abandoned Applications | 322 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 14785095
[patent_doc_number] => 20190267445
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-08-29
[patent_title] => Semiconductor Structure and Method
[patent_app_type] => utility
[patent_app_number] => 16/410440
[patent_app_country] => US
[patent_app_date] => 2019-05-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5600
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16410440
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/410440 | Semiconductor structure and method | May 12, 2019 | Issued |
Array
(
[id] => 16316231
[patent_doc_number] => 20200294969
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-09-17
[patent_title] => STACKED TRANSISTORS WITH DIELECTRIC BETWEEN SOURCE/DRAIN MATERIALS OF DIFFERENT STRATA
[patent_app_type] => utility
[patent_app_number] => 16/355623
[patent_app_country] => US
[patent_app_date] => 2019-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15410
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16355623
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/355623 | STACKED TRANSISTORS WITH DIELECTRIC BETWEEN SOURCE/DRAIN MATERIALS OF DIFFERENT STRATA | Mar 14, 2019 | Abandoned |
Array
(
[id] => 16241740
[patent_doc_number] => 20200258974
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-08-13
[patent_title] => DISPLAY DEVICE AND MANUFACTRUING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 16/499274
[patent_app_country] => US
[patent_app_date] => 2019-02-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3999
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 55
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16499274
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/499274 | DISPLAY DEVICE AND MANUFACTRUING METHOD THEREOF | Feb 20, 2019 | Abandoned |
Array
(
[id] => 19199250
[patent_doc_number] => 11996501
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-05-28
[patent_title] => Method for manufacturing light-emitting device
[patent_app_type] => utility
[patent_app_number] => 17/430481
[patent_app_country] => US
[patent_app_date] => 2019-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 25
[patent_no_of_words] => 17302
[patent_no_of_claims] => 39
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 311
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17430481
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/430481 | Method for manufacturing light-emitting device | Feb 19, 2019 | Issued |
Array
(
[id] => 14476439
[patent_doc_number] => 20190189868
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-06-20
[patent_title] => LIGHT EMITTING DEVICE AND METHOD FOR MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/269562
[patent_app_country] => US
[patent_app_date] => 2019-02-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13901
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 280
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16269562
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/269562 | Light emitting device and method for manufacturing the same | Feb 5, 2019 | Issued |
Array
(
[id] => 16440640
[patent_doc_number] => 20200357967
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-11-12
[patent_title] => SEMICONDUCTOR DEVICE PACKAGE AND LIGHT EMITTING DEVICE COMPRISING SAME
[patent_app_type] => utility
[patent_app_number] => 16/960695
[patent_app_country] => US
[patent_app_date] => 2019-02-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10954
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16960695
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/960695 | Semiconductor device package and light emitting device comprising same | Jan 31, 2019 | Issued |
Array
(
[id] => 14382631
[patent_doc_number] => 20190165228
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-05-30
[patent_title] => LIGHT EMITTING DEVICES AND COMPONENTS HAVING EXCELLENT CHEMICAL RESISTANCE AND RELATED METHODS
[patent_app_type] => utility
[patent_app_number] => 16/263191
[patent_app_country] => US
[patent_app_date] => 2019-01-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10676
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -35
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16263191
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/263191 | Light emitting devices and components having improved chemical resistance and related methods | Jan 30, 2019 | Issued |
Array
(
[id] => 14309127
[patent_doc_number] => 20190144267
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-05-16
[patent_title] => ELECTRONIC SENSORS WITH SENSOR DIE IN PACKAGE STRUCTURE CAVITY
[patent_app_type] => utility
[patent_app_number] => 16/247118
[patent_app_country] => US
[patent_app_date] => 2019-01-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7732
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -2
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16247118
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/247118 | Electronic sensors with sensor die in package structure cavity | Jan 13, 2019 | Issued |
Array
(
[id] => 16684304
[patent_doc_number] => 10943795
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-03-09
[patent_title] => Apparatus and methods for creating a thermal interface bond between a semiconductor die and a passive heat exchanger
[patent_app_type] => utility
[patent_app_number] => 16/246417
[patent_app_country] => US
[patent_app_date] => 2019-01-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 3190
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 157
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16246417
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/246417 | Apparatus and methods for creating a thermal interface bond between a semiconductor die and a passive heat exchanger | Jan 10, 2019 | Issued |
Array
(
[id] => 18105513
[patent_doc_number] => 11545410
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-01-03
[patent_title] => Enhanced systems and methods for improved heat transfer from semiconductor packages
[patent_app_type] => utility
[patent_app_number] => 16/222854
[patent_app_country] => US
[patent_app_date] => 2018-12-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 17
[patent_no_of_words] => 11936
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 335
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16222854
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/222854 | Enhanced systems and methods for improved heat transfer from semiconductor packages | Dec 16, 2018 | Issued |
Array
(
[id] => 16080807
[patent_doc_number] => 20200194390
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-06-18
[patent_title] => PACKAGE WITH DUAL LAYER ROUTING INCLUDING GROUND RETURN PATH
[patent_app_type] => utility
[patent_app_number] => 16/222920
[patent_app_country] => US
[patent_app_date] => 2018-12-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4528
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16222920
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/222920 | PACKAGE WITH DUAL LAYER ROUTING INCLUDING GROUND RETURN PATH | Dec 16, 2018 | Pending |
Array
(
[id] => 18105582
[patent_doc_number] => 11545480
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-01-03
[patent_title] => Integrated circuit with single level routing
[patent_app_type] => utility
[patent_app_number] => 16/222670
[patent_app_country] => US
[patent_app_date] => 2018-12-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 6804
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 143
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16222670
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/222670 | Integrated circuit with single level routing | Dec 16, 2018 | Issued |
Array
(
[id] => 14573733
[patent_doc_number] => 20190214474
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-07-11
[patent_title] => METHOD FOR FORMING A QUBIT DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/222911
[patent_app_country] => US
[patent_app_date] => 2018-12-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5708
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16222911
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/222911 | Method for forming a qubit device | Dec 16, 2018 | Issued |
Array
(
[id] => 17787738
[patent_doc_number] => 11410872
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-08-09
[patent_title] => Oxidized cavity structures within and under semiconductor devices
[patent_app_type] => utility
[patent_app_number] => 16/206375
[patent_app_country] => US
[patent_app_date] => 2018-11-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 28
[patent_no_of_words] => 5716
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 145
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16206375
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/206375 | Oxidized cavity structures within and under semiconductor devices | Nov 29, 2018 | Issued |
Array
(
[id] => 16372722
[patent_doc_number] => 10804488
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-10-13
[patent_title] => Display device
[patent_app_type] => utility
[patent_app_number] => 16/197548
[patent_app_country] => US
[patent_app_date] => 2018-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 6814
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 180
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16197548
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/197548 | Display device | Nov 20, 2018 | Issued |
Array
(
[id] => 14164239
[patent_doc_number] => 20190109222
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-04-11
[patent_title] => SEMICONDUCTOR DEVICES HAVING A PLURALITY OF UNIT CELL TRANSISTORS THAT HAVE SMOOTHED TURN-ON BEHAVIOR AND IMPROVED LINEARITY
[patent_app_type] => utility
[patent_app_number] => 16/194760
[patent_app_country] => US
[patent_app_date] => 2018-11-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 23067
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16194760
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/194760 | Semiconductor devices having a plurality of unit cell transistors that have smoothed turn-on behavior and improved linearity | Nov 18, 2018 | Issued |
Array
(
[id] => 14138047
[patent_doc_number] => 20190103413
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-04-04
[patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/189373
[patent_app_country] => US
[patent_app_date] => 2018-11-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11541
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -5
[patent_words_short_claim] => 661
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16189373
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/189373 | Semiconductor device and manufacturing method of the same | Nov 12, 2018 | Issued |
Array
(
[id] => 14024601
[patent_doc_number] => 20190074294
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-03-07
[patent_title] => SEMICONDUCTOR MEMORY DEVICE AND PRODUCTION METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 16/183389
[patent_app_country] => US
[patent_app_date] => 2018-11-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6338
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => 0
[patent_words_short_claim] => 299
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16183389
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/183389 | SEMICONDUCTOR MEMORY DEVICE AND PRODUCTION METHOD THEREOF | Nov 6, 2018 | Abandoned |
Array
(
[id] => 16187039
[patent_doc_number] => 10720376
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-07-21
[patent_title] => Discrete power transistor package having solderless DBC to leadframe attach
[patent_app_type] => utility
[patent_app_number] => 16/179432
[patent_app_country] => US
[patent_app_date] => 2018-11-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 15
[patent_no_of_words] => 4281
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 250
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16179432
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/179432 | Discrete power transistor package having solderless DBC to leadframe attach | Nov 1, 2018 | Issued |
Array
(
[id] => 14382593
[patent_doc_number] => 20190165209
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-05-30
[patent_title] => PHOTONIC CRYSTALS IN MICRO LIGHT-EMITTING DIODE DEVICES
[patent_app_type] => utility
[patent_app_number] => 16/169461
[patent_app_country] => US
[patent_app_date] => 2018-10-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3146
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16169461
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/169461 | PHOTONIC CRYSTALS IN MICRO LIGHT-EMITTING DIODE DEVICES | Oct 23, 2018 | Abandoned |