Search

Michael Bernshteyn

Examiner (ID: 11766, Phone: (571)272-2411 , Office: P/1762 )

Most Active Art Unit
1762
Art Unit(s)
1762, 1764, 1796, 1713
Total Applications
1884
Issued Applications
1528
Pending Applications
44
Abandoned Applications
322

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16417915 [patent_doc_number] => 10825816 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-03 [patent_title] => Recessed access devices and DRAM constructions [patent_app_type] => utility [patent_app_number] => 15/898086 [patent_app_country] => US [patent_app_date] => 2018-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 3996 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15898086 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/898086
Recessed access devices and DRAM constructions Feb 14, 2018 Issued
Array ( [id] => 13514829 [patent_doc_number] => 20180308957 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-25 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 15/898201 [patent_app_country] => US [patent_app_date] => 2018-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17031 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15898201 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/898201
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE Feb 14, 2018 Abandoned
Array ( [id] => 13392913 [patent_doc_number] => 20180247999 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-30 [patent_title] => METAL-OXIDE-SEMICONDUCTOR FIELD-EFFECT TRANSISTOR [patent_app_type] => utility [patent_app_number] => 15/897452 [patent_app_country] => US [patent_app_date] => 2018-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6164 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15897452 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/897452
METAL-OXIDE-SEMICONDUCTOR FIELD-EFFECT TRANSISTOR Feb 14, 2018 Abandoned
Array ( [id] => 13363861 [patent_doc_number] => 20180233470 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-16 [patent_title] => HANDLING THIN WAFER DURING CHIP MANUFACTURE [patent_app_type] => utility [patent_app_number] => 15/897654 [patent_app_country] => US [patent_app_date] => 2018-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8478 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15897654 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/897654
HANDLING THIN WAFER DURING CHIP MANUFACTURE Feb 14, 2018 Abandoned
Array ( [id] => 16233934 [patent_doc_number] => 10741497 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-11 [patent_title] => Contact and interconnect structures [patent_app_type] => utility [patent_app_number] => 15/897416 [patent_app_country] => US [patent_app_date] => 2018-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3542 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15897416 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/897416
Contact and interconnect structures Feb 14, 2018 Issued
Array ( [id] => 16536582 [patent_doc_number] => 10879195 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-29 [patent_title] => Method for substrate moisture NCF voiding elimination [patent_app_type] => utility [patent_app_number] => 15/898004 [patent_app_country] => US [patent_app_date] => 2018-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 4087 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15898004 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/898004
Method for substrate moisture NCF voiding elimination Feb 14, 2018 Issued
Array ( [id] => 13528493 [patent_doc_number] => 20180315789 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-01 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 15/898197 [patent_app_country] => US [patent_app_date] => 2018-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9462 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 379 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15898197 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/898197
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME Feb 14, 2018 Abandoned
Array ( [id] => 17926123 [patent_doc_number] => 11469388 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-11 [patent_title] => Electroluminescent device and light-emitting layer and application thereof [patent_app_type] => utility [patent_app_number] => 16/637416 [patent_app_country] => US [patent_app_date] => 2018-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 5826 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16637416 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/637416
Electroluminescent device and light-emitting layer and application thereof Jan 24, 2018 Issued
Array ( [id] => 12692686 [patent_doc_number] => 20180122728 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-03 [patent_title] => SEMICONDUCTOR PACKAGES AND METHODS FOR FORMING SAME [patent_app_type] => utility [patent_app_number] => 15/858999 [patent_app_country] => US [patent_app_date] => 2017-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3460 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15858999 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/858999
SEMICONDUCTOR PACKAGES AND METHODS FOR FORMING SAME Dec 28, 2017 Abandoned
Array ( [id] => 12650610 [patent_doc_number] => 20180108701 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-19 [patent_title] => INFRARED DETECTOR, INFRARED DETECTION SENSOR HAVING AN INFRARED DETECTOR AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 15/837492 [patent_app_country] => US [patent_app_date] => 2017-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8988 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15837492 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/837492
Infrared detector, infrared detection sensor having an infrared detector and method of manufacturing the same Dec 10, 2017 Issued
Array ( [id] => 12208620 [patent_doc_number] => 20180053846 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-22 [patent_title] => 'FABRICATION OF VERTICAL FIN TRANSISTOR WITH MULTIPLE THRESHOLD VOLTAGES' [patent_app_type] => utility [patent_app_number] => 15/783693 [patent_app_country] => US [patent_app_date] => 2017-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7148 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15783693 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/783693
Fabrication of vertical fin transistor with multiple threshold voltages Oct 12, 2017 Issued
Array ( [id] => 16789383 [patent_doc_number] => 10991823 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-27 [patent_title] => Fabrication of vertical fin transistor with multiple threshold voltages [patent_app_type] => utility [patent_app_number] => 15/783781 [patent_app_country] => US [patent_app_date] => 2017-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 23 [patent_no_of_words] => 7139 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15783781 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/783781
Fabrication of vertical fin transistor with multiple threshold voltages Oct 12, 2017 Issued
Array ( [id] => 16911537 [patent_doc_number] => 11043587 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-22 [patent_title] => Fabrication of vertical fin transistor with multiple threshold voltages [patent_app_type] => utility [patent_app_number] => 15/783749 [patent_app_country] => US [patent_app_date] => 2017-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 22 [patent_no_of_words] => 6911 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15783749 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/783749
Fabrication of vertical fin transistor with multiple threshold voltages Oct 12, 2017 Issued
Array ( [id] => 13709147 [patent_doc_number] => 20170365528 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-21 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 15/692752 [patent_app_country] => US [patent_app_date] => 2017-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5599 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15692752 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/692752
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE Aug 30, 2017 Abandoned
Array ( [id] => 13995943 [patent_doc_number] => 20190067129 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => METHOD FOR FORMING SEMICONDUCTOR DEVICE AND RESULTING DEVICE [patent_app_type] => utility [patent_app_number] => 15/690340 [patent_app_country] => US [patent_app_date] => 2017-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5141 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15690340 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/690340
Method for forming semiconductor device and resulting device Aug 29, 2017 Issued
Array ( [id] => 13514773 [patent_doc_number] => 20180308929 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-25 [patent_title] => MEMORY STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 15/690298 [patent_app_country] => US [patent_app_date] => 2017-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3102 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15690298 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/690298
Memory structure Aug 29, 2017 Issued
Array ( [id] => 17745702 [patent_doc_number] => 11393784 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-19 [patent_title] => Semiconductor package devices and method for forming semiconductor package devices [patent_app_type] => utility [patent_app_number] => 15/690517 [patent_app_country] => US [patent_app_date] => 2017-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 24 [patent_no_of_words] => 12551 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15690517 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/690517
Semiconductor package devices and method for forming semiconductor package devices Aug 29, 2017 Issued
Array ( [id] => 13321017 [patent_doc_number] => 20180212046 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-26 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 15/690448 [patent_app_country] => US [patent_app_date] => 2017-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6075 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 260 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15690448 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/690448
Semiconductor device Aug 29, 2017 Issued
Array ( [id] => 13996125 [patent_doc_number] => 20190067220 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => PACKAGE STRUCTURE AND METHOD OF FABRICATING PACKAGE STRUCTURE [patent_app_type] => utility [patent_app_number] => 15/690287 [patent_app_country] => US [patent_app_date] => 2017-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5571 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15690287 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/690287
Package structure and method of fabricating package structure Aug 29, 2017 Issued
Array ( [id] => 13996105 [patent_doc_number] => 20190067210 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => SEAL RING STRUCTURE OF INTEGRATED CIRCUIT AND METHOD OF FORMING SAME [patent_app_type] => utility [patent_app_number] => 15/690398 [patent_app_country] => US [patent_app_date] => 2017-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4652 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15690398 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/690398
Seal ring structure of integrated circuit and method of forming same Aug 29, 2017 Issued
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