
Michael Bernshteyn
Examiner (ID: 11766, Phone: (571)272-2411 , Office: P/1762 )
| Most Active Art Unit | 1762 |
| Art Unit(s) | 1762, 1764, 1796, 1713 |
| Total Applications | 1884 |
| Issued Applications | 1528 |
| Pending Applications | 44 |
| Abandoned Applications | 322 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 143049
[patent_doc_number] => 07692212
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2010-04-06
[patent_title] => 'Transistor with InGaAsP collector region and integrated opto-electronic devices employing same'
[patent_app_type] => utility
[patent_app_number] => 11/007697
[patent_app_country] => US
[patent_app_date] => 2004-12-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2332
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[patent_words_short_claim] => 97
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/692/07692212.pdf
[firstpage_image] =>[orig_patent_app_number] => 11007697
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/007697 | Transistor with InGaAsP collector region and integrated opto-electronic devices employing same | Dec 6, 2004 | Issued |
Array
(
[id] => 5611696
[patent_doc_number] => 20060113622
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-06-01
[patent_title] => 'A DAMASCENE COPPER WIRING IMAGE SENSOR'
[patent_app_type] => utility
[patent_app_number] => 10/904807
[patent_app_country] => US
[patent_app_date] => 2004-11-30
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0113/20060113622.pdf
[firstpage_image] =>[orig_patent_app_number] => 10904807
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/904807 | Damascene copper wiring image sensor | Nov 29, 2004 | Issued |
Array
(
[id] => 323009
[patent_doc_number] => 07518242
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-04-14
[patent_title] => 'Semiconductor testing device'
[patent_app_type] => utility
[patent_app_number] => 10/995467
[patent_app_country] => US
[patent_app_date] => 2004-11-24
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/995467 | Semiconductor testing device | Nov 23, 2004 | Issued |
Array
(
[id] => 4537764
[patent_doc_number] => 07888718
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-02-15
[patent_title] => 'Charge-dipole coupled information storage medium'
[patent_app_type] => utility
[patent_app_number] => 10/996057
[patent_app_country] => US
[patent_app_date] => 2004-11-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/996057 | Charge-dipole coupled information storage medium | Nov 23, 2004 | Issued |
Array
(
[id] => 7072570
[patent_doc_number] => 20050145836
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[patent_kind] => A1
[patent_issue_date] => 2005-07-07
[patent_title] => 'Influence of surface geometry'
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[pdf_file] => publications/A1/0145/20050145836.pdf
[firstpage_image] =>[orig_patent_app_number] => 10991257
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/991257 | Influence of surface geometry | Nov 15, 2004 | Abandoned |
Array
(
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[patent_doc_number] => 20060054898
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-03-16
[patent_title] => 'Light-emitting gallium nitride-based III-V group compound semiconductor device with high light extraction efficiency'
[patent_app_type] => utility
[patent_app_number] => 10/986147
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/986147 | Light-emitting gallium nitride-based III-V group compound semiconductor device with high light extraction efficiency | Nov 11, 2004 | Issued |
Array
(
[id] => 449820
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[patent_title] => 'Dual semiconductor die package with reverse lead form'
[patent_app_type] => utility
[patent_app_number] => 10/987697
[patent_app_country] => US
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[pdf_file] => patents/07/250/07250672.pdf
[firstpage_image] =>[orig_patent_app_number] => 10987697
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/987697 | Dual semiconductor die package with reverse lead form | Nov 11, 2004 | Issued |
Array
(
[id] => 5863220
[patent_doc_number] => 20060097350
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[patent_kind] => A1
[patent_issue_date] => 2006-05-11
[patent_title] => 'BIPOLAR TRANSISTOR WITH SELF-ALIGNED RETROGRADE EXTRINSIC BASE IMPLANT PROFILE AND SELF-ALIGNED SILICIDE'
[patent_app_type] => utility
[patent_app_number] => 10/904437
[patent_app_country] => US
[patent_app_date] => 2004-11-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 58
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[patent_no_of_words] => 5585
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[pdf_file] => publications/A1/0097/20060097350.pdf
[firstpage_image] =>[orig_patent_app_number] => 10904437
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/904437 | Bipolar transistor with self-aligned retrograde extrinsic base implant profile and self-aligned silicide | Nov 9, 2004 | Issued |
Array
(
[id] => 422121
[patent_doc_number] => 07274053
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-09-25
[patent_title] => 'Fin device with capacitor integrated under gate electrode'
[patent_app_type] => utility
[patent_app_number] => 10/904357
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/904357 | Fin device with capacitor integrated under gate electrode | Nov 4, 2004 | Issued |
Array
(
[id] => 5805140
[patent_doc_number] => 20060091493
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[patent_issue_date] => 2006-05-04
[patent_title] => 'LOCOS Schottky barrier contact structure and its manufacturing method'
[patent_app_type] => utility
[patent_app_number] => 10/976887
[patent_app_country] => US
[patent_app_date] => 2004-11-01
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/976887 | LOCOS Schottky barrier contact structure and its manufacturing method | Oct 31, 2004 | Abandoned |
Array
(
[id] => 5805059
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[patent_title] => 'High brightness LED package'
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[firstpage_image] =>[orig_patent_app_number] => 10977577
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/977577 | High brightness LED package | Oct 28, 2004 | Abandoned |
Array
(
[id] => 5898134
[patent_doc_number] => 20060043367
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[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING A LOW TEMPERATURE POLY-SILICON LAYER'
[patent_app_type] => utility
[patent_app_number] => 10/904157
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/904157 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING A LOW TEMPERATURE POLY-SILICON LAYER | Oct 26, 2004 | Abandoned |
Array
(
[id] => 908130
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[patent_issue_date] => 2008-02-19
[patent_title] => 'Flat panel display device'
[patent_app_type] => utility
[patent_app_number] => 10/971007
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[firstpage_image] =>[orig_patent_app_number] => 10971007
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/971007 | Flat panel display device | Oct 24, 2004 | Issued |
Array
(
[id] => 8525632
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[patent_title] => 'Active matrix display device having wiring layers which are connected over multiple contact parts'
[patent_app_type] => reissue
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Array
(
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Array
(
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Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/711637 | Structure and method for making strained channel field effect transistor using sacrificial spacer | Sep 28, 2004 | Issued |
Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/946787 | Light emitting element, method of manufacturing the same, and semiconductor device having light emitting element | Sep 21, 2004 | Issued |