Michael C. Krofcheck

Array ( [id] => 18934317 [patent_doc_number] => 11886751 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-30 [patent_title] => Intelligent block slicing in network attached storage for data protection [patent_app_type] => utility [patent_app_number] => 17/084883 [patent_app_country] => US [patent_app_date] => 2020-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 9221 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 359 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17084883 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17999673 [patent_doc_number] => 11500780 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-15 [patent_title] => Recovery of validity data for a data storage system [patent_app_type] => utility [patent_app_number] => 17/086152 [patent_app_country] => US [patent_app_date] => 2020-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5278 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17086152 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17550230 [patent_doc_number] => 20220121572 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-21 [patent_title] => POOLING DISTRIBUTED STORAGE NODES THAT HAVE BACKUP POWER SUPPLIES AND WRITE-BACK CACHING CAPABILITIES [patent_app_type] => utility [patent_app_number] => 17/074977 [patent_app_country] => US [patent_app_date] => 2020-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4901 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17074977 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17924529 [patent_doc_number] => 11467777 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-10-11 [patent_title] => Method and system for storing data in portable storage devices [patent_app_type] => utility [patent_app_number] => 17/067932 [patent_app_country] => US [patent_app_date] => 2020-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6435 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 386 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17067932 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17521880 [patent_doc_number] => 20220107729 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-07 [patent_title] => REORGANIZING DISKS AND RAID MEMBERS TO SPLIT A DISK ARRAY DURING CAPACITY EXPANSION [patent_app_type] => utility [patent_app_number] => 17/061940 [patent_app_country] => US [patent_app_date] => 2020-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5749 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17061940 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17522053 [patent_doc_number] => 20220107902 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-07 [patent_title] => METADATA CACHE FOR STORING MANIFEST PORTION [patent_app_type] => utility [patent_app_number] => 17/060456 [patent_app_country] => US [patent_app_date] => 2020-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7325 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17060456 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17507509 [patent_doc_number] => 20220100612 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-31 [patent_title] => OPTIMIZED PIPELINE TO BOOST DE-DUP SYSTEM PERFORMANCE [patent_app_type] => utility [patent_app_number] => 17/037336 [patent_app_country] => US [patent_app_date] => 2020-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3219 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17037336 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16579922 [patent_doc_number] => 20210014324 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-14 [patent_title] => CACHE AND MEMORY CONTENT MANAGEMENT [patent_app_type] => utility [patent_app_number] => 17/031659 [patent_app_country] => US [patent_app_date] => 2020-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12716 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17031659 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17484482 [patent_doc_number] => 20220091986 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-24 [patent_title] => METHOD AND APPARATUS FOR REDUCING THE LATENCY OF LONG LATENCY MEMORY REQUESTS [patent_app_type] => utility [patent_app_number] => 17/029976 [patent_app_country] => US [patent_app_date] => 2020-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10162 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17029976 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17636937 [patent_doc_number] => 11347661 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-31 [patent_title] => Transitioning between thread-confined memory segment views and shared memory segment views [patent_app_type] => utility [patent_app_number] => 17/024209 [patent_app_country] => US [patent_app_date] => 2020-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11130 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17024209 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16543455 [patent_doc_number] => 20200409870 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-31 [patent_title] => DATA VALIDITY TRACKING IN A NON-VOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 17/020662 [patent_app_country] => US [patent_app_date] => 2020-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8071 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17020662 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17309107 [patent_doc_number] => 11210218 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-12-28 [patent_title] => Addressing for disaggregated memory pool [patent_app_type] => utility [patent_app_number] => 17/011906 [patent_app_country] => US [patent_app_date] => 2020-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 7604 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17011906 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18204159 [patent_doc_number] => 11586551 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-21 [patent_title] => Storage array invalidation maintenance [patent_app_type] => utility [patent_app_number] => 17/008491 [patent_app_country] => US [patent_app_date] => 2020-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11530 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17008491 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17415889 [patent_doc_number] => 20220050793 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-17 [patent_title] => PREVENTION OF RAM ACCESS PATTERN ATTACKS VIA SELECTIVE DATA MOVEMENT [patent_app_type] => utility [patent_app_number] => 17/006565 [patent_app_country] => US [patent_app_date] => 2020-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12106 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17006565 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16659392 [patent_doc_number] => 20210056029 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-25 [patent_title] => Hybrid Memory Systems with Cache Management [patent_app_type] => utility [patent_app_number] => 16/994233 [patent_app_country] => US [patent_app_date] => 2020-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14980 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16994233 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17729417 [patent_doc_number] => 11385804 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-12 [patent_title] => Storing de-duplicated data with minimal reference counts [patent_app_type] => utility [patent_app_number] => 16/984522 [patent_app_country] => US [patent_app_date] => 2020-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4869 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16984522 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18330664 [patent_doc_number] => 11635906 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-25 [patent_title] => Acceleration of data queries in memory [patent_app_type] => utility [patent_app_number] => 16/984429 [patent_app_country] => US [patent_app_date] => 2020-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 7776 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16984429 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18015209 [patent_doc_number] => 11507507 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-22 [patent_title] => System and method of backing up data from a volatile memory medium to a non-volatile memory medium [patent_app_type] => utility [patent_app_number] => 16/938225 [patent_app_country] => US [patent_app_date] => 2020-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 10103 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16938225 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17542874 [patent_doc_number] => 11307997 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-19 [patent_title] => Logical to physical data storage mapping [patent_app_type] => utility [patent_app_number] => 16/909617 [patent_app_country] => US [patent_app_date] => 2020-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 7394 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16909617 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18703102 [patent_doc_number] => 11789612 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-17 [patent_title] => Plane programming scheme for non-volatile memory with large block sizes [patent_app_type] => utility [patent_app_number] => 16/903196 [patent_app_country] => US [patent_app_date] => 2020-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 23 [patent_no_of_words] => 16310 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 295 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16903196 [rel_patent_id] =>[rel_patent_doc_number] =>)