Search

Michael C. Krofcheck

Examiner (ID: 605, Phone: (571)272-8193 , Office: P/2138 )

Most Active Art Unit
2138
Art Unit(s)
2138, 2186, 2188
Total Applications
816
Issued Applications
646
Pending Applications
49
Abandoned Applications
139

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20500467 [patent_doc_number] => 20260029927 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-29 [patent_title] => STORAGE DEVICE AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/954184 [patent_app_country] => US [patent_app_date] => 2024-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2411 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18954184 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/954184
STORAGE DEVICE AND OPERATING METHOD THEREOF Nov 19, 2024 Pending
Array ( [id] => 20043051 [patent_doc_number] => 20250181273 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-05 [patent_title] => PARALLEL FOLDING AND HOST WRITE HANDLING [patent_app_type] => utility [patent_app_number] => 18/954258 [patent_app_country] => US [patent_app_date] => 2024-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9638 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18954258 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/954258
PARALLEL FOLDING AND HOST WRITE HANDLING Nov 19, 2024 Pending
Array ( [id] => 20018090 [patent_doc_number] => 20250156312 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-15 [patent_title] => STORAGE SYSTEM AND OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/937220 [patent_app_country] => US [patent_app_date] => 2024-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13916 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18937220 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/937220
STORAGE SYSTEM AND OPERATION METHOD THEREOF Nov 4, 2024 Pending
Array ( [id] => 19787211 [patent_doc_number] => 20250060890 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-20 [patent_title] => METHODS AND ALLOCATORS FOR ALLOCATING PORTIONS OF A STORAGE UNIT USING VIRTUAL PARTITIONING [patent_app_type] => utility [patent_app_number] => 18/936802 [patent_app_country] => US [patent_app_date] => 2024-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18812 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 260 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18936802 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/936802
Methods and allocators for allocating portions of a storage unit using virtual partitioning Nov 3, 2024 Issued
Array ( [id] => 20550298 [patent_doc_number] => 12561090 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-24 [patent_title] => NAND-based storage device with partitioned nonvolatile write buffer [patent_app_type] => utility [patent_app_number] => 18/928734 [patent_app_country] => US [patent_app_date] => 2024-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 9837 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18928734 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/928734
NAND-based storage device with partitioned nonvolatile write buffer Oct 27, 2024 Issued
Array ( [id] => 20009653 [patent_doc_number] => 20250147875 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-08 [patent_title] => MEMORY DEVICE WITH STAGGERED ACCESS [patent_app_type] => utility [patent_app_number] => 18/920086 [patent_app_country] => US [patent_app_date] => 2024-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18920086 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/920086
Memory device with staggered access Oct 17, 2024 Issued
Array ( [id] => 19725901 [patent_doc_number] => 20250028652 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-23 [patent_title] => VICTIM CACHE WITH DYNAMIC ALLOCATION OF ENTRIES [patent_app_type] => utility [patent_app_number] => 18/909000 [patent_app_country] => US [patent_app_date] => 2024-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26313 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18909000 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/909000
VICTIM CACHE WITH DYNAMIC ALLOCATION OF ENTRIES Oct 7, 2024 Pending
Array ( [id] => 20731970 [patent_doc_number] => 12639228 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-26 [patent_title] => Silent cache line eviction [patent_app_type] => utility [patent_app_number] => 18/887810 [patent_app_country] => US [patent_app_date] => 2024-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5560 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18887810 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/887810
Silent cache line eviction Sep 16, 2024 Issued
Array ( [id] => 19633010 [patent_doc_number] => 20240411459 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-12 [patent_title] => CODE RATE AS FUNCTION OF LOGICAL SATURATION [patent_app_type] => utility [patent_app_number] => 18/811658 [patent_app_country] => US [patent_app_date] => 2024-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9578 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18811658 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/811658
CODE RATE AS FUNCTION OF LOGICAL SATURATION Aug 20, 2024 Pending
Array ( [id] => 19617242 [patent_doc_number] => 20240402922 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-05 [patent_title] => TWO-TIER DEFECT SCAN MANAGEMENT [patent_app_type] => utility [patent_app_number] => 18/806444 [patent_app_country] => US [patent_app_date] => 2024-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14535 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18806444 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/806444
Two-tier defect scan management Aug 14, 2024 Issued
Array ( [id] => 20513321 [patent_doc_number] => 20260037422 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-05 [patent_title] => PROCESSOR SUITABLE FOR MULTI-SEGMENT ACCESSING MEMORY AND OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/793948 [patent_app_country] => US [patent_app_date] => 2024-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10289 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18793948 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/793948
Processor suitable for multi-segment accessing memory and operation method thereof Aug 4, 2024 Issued
Array ( [id] => 20234392 [patent_doc_number] => 20250291711 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-18 [patent_title] => MEMORY SYSTEM FOR PROCESSING WRITTEN DATA BY ZONE AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/792246 [patent_app_country] => US [patent_app_date] => 2024-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1274 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18792246 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/792246
MEMORY SYSTEM FOR PROCESSING WRITTEN DATA BY ZONE AND METHOD OF OPERATING THE SAME Jul 31, 2024 Pending
Array ( [id] => 19834316 [patent_doc_number] => 20250086102 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-13 [patent_title] => Processing Memory Access Transactions [patent_app_type] => utility [patent_app_number] => 18/791035 [patent_app_country] => US [patent_app_date] => 2024-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6587 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18791035 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/791035
Processing Memory Access Transactions Jul 30, 2024 Pending
Array ( [id] => 20513320 [patent_doc_number] => 20260037421 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-05 [patent_title] => PADDING MEMORY BY PROGRAMMING USER DATA IN PARALLEL [patent_app_type] => utility [patent_app_number] => 18/791349 [patent_app_country] => US [patent_app_date] => 2024-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3261 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18791349 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/791349
PADDING MEMORY BY PROGRAMMING USER DATA IN PARALLEL Jul 30, 2024 Pending
Array ( [id] => 19834317 [patent_doc_number] => 20250086103 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-13 [patent_title] => Processing Memory Access Transactions [patent_app_type] => utility [patent_app_number] => 18/791162 [patent_app_country] => US [patent_app_date] => 2024-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6730 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18791162 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/791162
Processing Memory Access Transactions Jul 30, 2024 Pending
Array ( [id] => 19772095 [patent_doc_number] => 20250053521 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-13 [patent_title] => CONTEXT-BASED COMPRESSION IN A MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 18/786296 [patent_app_country] => US [patent_app_date] => 2024-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5369 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18786296 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/786296
CONTEXT-BASED COMPRESSION IN A MEMORY SYSTEM Jul 25, 2024 Pending
Array ( [id] => 19747720 [patent_doc_number] => 20250036285 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-30 [patent_title] => METHOD AND SYSTEM FOR TRACKING AND MOVING PAGES WITHIN A MEMORY HIERARCHY [patent_app_type] => utility [patent_app_number] => 18/785542 [patent_app_country] => US [patent_app_date] => 2024-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8205 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18785542 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/785542
METHOD AND SYSTEM FOR TRACKING AND MOVING PAGES WITHIN A MEMORY HIERARCHY Jul 25, 2024 Pending
Array ( [id] => 20500701 [patent_doc_number] => 20260030162 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-29 [patent_title] => CACHING DATA OF MEMORY ROWS [patent_app_type] => utility [patent_app_number] => 18/784267 [patent_app_country] => US [patent_app_date] => 2024-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18784267 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/784267
CACHING DATA OF MEMORY ROWS Jul 24, 2024 Issued
Array ( [id] => 20487754 [patent_doc_number] => 20260023954 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-22 [patent_title] => Read-Modify-Write for Lossless Tiling in Convolution Networks [patent_app_type] => utility [patent_app_number] => 18/779781 [patent_app_country] => US [patent_app_date] => 2024-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7357 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18779781 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/779781
Read-modify-write for lossless tiling in convolution networks Jul 21, 2024 Issued
Array ( [id] => 20152200 [patent_doc_number] => 20250252038 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-07 [patent_title] => NON-VOLATILE MEMORY DEVICE PERFORMING RESET OPERATION, STORAGE DEVICE INCLUDING THE SAME, METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/779352 [patent_app_country] => US [patent_app_date] => 2024-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4462 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18779352 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/779352
Non-volatile memory device performing reset operation, storage device including the same, method of operating the same Jul 21, 2024 Issued
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