Michael D. Yaary

Array ( [id] => 20110020 [patent_doc_number] => 12360741 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-15 [patent_title] => Multiply operation circuit, multiply and accumulate circuit, and methods thereof [patent_app_type] => utility [patent_app_number] => 17/324557 [patent_app_country] => US [patent_app_date] => 2021-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 10356 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17324557 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18750481 [patent_doc_number] => 11809795 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-07 [patent_title] => Implementing fixed-point polynomials in hardware logic [patent_app_type] => utility [patent_app_number] => 17/323373 [patent_app_country] => US [patent_app_date] => 2021-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 9964 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17323373 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18750204 [patent_doc_number] => 11809515 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-07 [patent_title] => Reduced dot product computation circuit [patent_app_type] => utility [patent_app_number] => 17/316639 [patent_app_country] => US [patent_app_date] => 2021-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 12290 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17316639 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20564341 [patent_doc_number] => 12566951 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-03 [patent_title] => Method and apparatus for performing deep learning operations [patent_app_type] => utility [patent_app_number] => 17/307072 [patent_app_country] => US [patent_app_date] => 2021-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 2276 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17307072 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19933698 [patent_doc_number] => 12306902 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-20 [patent_title] => Hardware acceleration for computing eigenpairs of a matrix [patent_app_type] => utility [patent_app_number] => 17/245801 [patent_app_country] => US [patent_app_date] => 2021-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 13185 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17245801 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17186933 [patent_doc_number] => 20210333818 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-28 [patent_title] => PHOTONICS PROCESSOR ARCHITECTURE [patent_app_type] => utility [patent_app_number] => 17/240573 [patent_app_country] => US [patent_app_date] => 2021-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21094 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17240573 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17962043 [patent_doc_number] => 20220342624 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-27 [patent_title] => METHOD AND MONITORING SYSTEM FOR PROVIDING SIGNAL LEVEL PERFORMANCE INFORMATION [patent_app_type] => utility [patent_app_number] => 17/237919 [patent_app_country] => US [patent_app_date] => 2021-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6986 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17237919 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16996115 [patent_doc_number] => 20210234535 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-29 [patent_title] => FILTERING METHOD AND DEVICE OF FILTER, FILTER AND STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 17/230107 [patent_app_country] => US [patent_app_date] => 2021-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7755 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17230107 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19107460 [patent_doc_number] => 11960566 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-04-16 [patent_title] => Reducing computations for data including padding [patent_app_type] => utility [patent_app_number] => 17/229742 [patent_app_country] => US [patent_app_date] => 2021-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 15765 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17229742 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16994472 [patent_doc_number] => 20210232892 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-29 [patent_title] => Neuro-Processing Circuit Using Three-Dimensional Memory to Store Look-Up Table of Activation Function [patent_app_type] => utility [patent_app_number] => 17/227323 [patent_app_country] => US [patent_app_date] => 2021-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6744 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17227323 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19764718 [patent_doc_number] => 12223009 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-11 [patent_title] => Systems and methods for efficient matrix multiplication [patent_app_type] => utility [patent_app_number] => 17/217776 [patent_app_country] => US [patent_app_date] => 2021-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 6353 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17217776 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17899463 [patent_doc_number] => 20220309125 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => DATA COMPRESSOR FOR APPROXIMATION OF MATRICES FOR MATRIX MULTIPLY OPERATIONS [patent_app_type] => utility [patent_app_number] => 17/214779 [patent_app_country] => US [patent_app_date] => 2021-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7264 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17214779 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18320442 [patent_doc_number] => 20230118570 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-20 [patent_title] => PARALLEL FINITE FIELD MULTIPLICATION DEVICE [patent_app_type] => utility [patent_app_number] => 17/906985 [patent_app_country] => US [patent_app_date] => 2021-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4256 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17906985 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17129213 [patent_doc_number] => 20210303982 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-30 [patent_title] => NEURAL NETWORK COMPUTING DEVICE INCLUDING ON-DEVICE QUANTIZER, OPERATING METHOD OF NEURAL NETWORK COMPUTING DEVICE, AND COMPUTING DEVICE INCLUDING NEURAL NETWORK COMPUTING DEVICE [patent_app_type] => utility [patent_app_number] => 17/205433 [patent_app_country] => US [patent_app_date] => 2021-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7147 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17205433 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18361324 [patent_doc_number] => 20230142915 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-11 [patent_title] => HARDWARE RANDOM NUMBER GENERATOR [patent_app_type] => utility [patent_app_number] => 17/912736 [patent_app_country] => US [patent_app_date] => 2021-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9216 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17912736 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18622641 [patent_doc_number] => 11755684 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-09-12 [patent_title] => Systems and methods for memory efficient parallel tensor decompositions [patent_app_type] => utility [patent_app_number] => 17/205741 [patent_app_country] => US [patent_app_date] => 2021-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 10539 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17205741 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17186352 [patent_doc_number] => 20210333237 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-28 [patent_title] => DISTORTION-FREE BOUNDARY EXTENSION METHOD FOR ONLINE WAVELET DENOISING [patent_app_type] => utility [patent_app_number] => 17/202787 [patent_app_country] => US [patent_app_date] => 2021-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8368 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17202787 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16934622 [patent_doc_number] => 20210200511 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-01 [patent_title] => Partially and Fully Parallel Normaliser [patent_app_type] => utility [patent_app_number] => 17/202260 [patent_app_country] => US [patent_app_date] => 2021-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5937 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17202260 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18539641 [patent_doc_number] => 20230244749 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-03 [patent_title] => GPU COMMUNICATION METHOD AND DEVICE, AND MEDIUM [patent_app_type] => utility [patent_app_number] => 18/013170 [patent_app_country] => US [patent_app_date] => 2021-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4873 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18013170 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17476341 [patent_doc_number] => 20220083845 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-17 [patent_title] => ARITHMETIC DEVICE AND NEURAL NETWORK DEVICE [patent_app_type] => utility [patent_app_number] => 17/184432 [patent_app_country] => US [patent_app_date] => 2021-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11974 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 274 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17184432 [rel_patent_id] =>[rel_patent_doc_number] =>)