Search

Michael E. Barr

Supervisory Patent Examiner (ID: 16588, Phone: (571)272-1414 , Office: P/1711 )

Most Active Art Unit
1762
Art Unit(s)
1792, 1762, 1711, 1112
Total Applications
855
Issued Applications
630
Pending Applications
59
Abandoned Applications
171

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8535983 [patent_doc_number] => 08312146 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-13 [patent_title] => 'Methods and apparatus for enabling dynamic resource collaboration' [patent_app_type] => utility [patent_app_number] => 11/280603 [patent_app_country] => US [patent_app_date] => 2005-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 14187 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11280603 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/280603
Methods and apparatus for enabling dynamic resource collaboration Nov 14, 2005 Issued
Array ( [id] => 5036796 [patent_doc_number] => 20070101335 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-03 [patent_title] => 'Identifying separate threads executing within a single process' [patent_app_type] => utility [patent_app_number] => 11/266506 [patent_app_country] => US [patent_app_date] => 2005-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4602 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0101/20070101335.pdf [firstpage_image] =>[orig_patent_app_number] => 11266506 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/266506
Identifying separate threads executing within a single process Nov 2, 2005 Issued
Array ( [id] => 5036797 [patent_doc_number] => 20070101336 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-03 [patent_title] => 'Method and apparatus for scheduling jobs on a network' [patent_app_type] => utility [patent_app_number] => 11/266804 [patent_app_country] => US [patent_app_date] => 2005-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5757 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0101/20070101336.pdf [firstpage_image] =>[orig_patent_app_number] => 11266804 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/266804
Method and apparatus for scheduling jobs on a network Nov 2, 2005 Issued
Array ( [id] => 9204 [patent_doc_number] => 07818747 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-10-19 [patent_title] => 'Cache-aware scheduling for a chip multithreading processor' [patent_app_type] => utility [patent_app_number] => 11/265814 [patent_app_country] => US [patent_app_date] => 2005-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3848 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/818/07818747.pdf [firstpage_image] =>[orig_patent_app_number] => 11265814 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/265814
Cache-aware scheduling for a chip multithreading processor Nov 2, 2005 Issued
Array ( [id] => 5728730 [patent_doc_number] => 20060059491 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-16 [patent_title] => 'Controller and operating system' [patent_app_type] => utility [patent_app_number] => 11/265226 [patent_app_country] => US [patent_app_date] => 2005-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 14990 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20060059491.pdf [firstpage_image] =>[orig_patent_app_number] => 11265226 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/265226
Controller and operating system Nov 2, 2005 Abandoned
Array ( [id] => 5195377 [patent_doc_number] => 20070083862 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-12 [patent_title] => 'Direct-memory access between input/output device and physical memory within virtual machine environment' [patent_app_type] => utility [patent_app_number] => 11/246733 [patent_app_country] => US [patent_app_date] => 2005-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7251 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0083/20070083862.pdf [firstpage_image] =>[orig_patent_app_number] => 11246733 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/246733
Direct-memory access between input/output device and physical memory within virtual machine environment Oct 7, 2005 Issued
Array ( [id] => 5134599 [patent_doc_number] => 20070076228 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-05 [patent_title] => 'System and method for providing data services via a network' [patent_app_type] => utility [patent_app_number] => 11/243168 [patent_app_country] => US [patent_app_date] => 2005-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 14267 [patent_no_of_claims] => 64 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0076/20070076228.pdf [firstpage_image] =>[orig_patent_app_number] => 11243168 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/243168
System and method for providing data services via a network Oct 3, 2005 Abandoned
Array ( [id] => 4528652 [patent_doc_number] => 07934216 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-26 [patent_title] => 'Method and system for load balancing of computing resources' [patent_app_type] => utility [patent_app_number] => 11/242678 [patent_app_country] => US [patent_app_date] => 2005-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4382 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 426 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/934/07934216.pdf [firstpage_image] =>[orig_patent_app_number] => 11242678 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/242678
Method and system for load balancing of computing resources Oct 2, 2005 Issued
Array ( [id] => 8424815 [patent_doc_number] => 08281313 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-10-02 [patent_title] => 'Scheduling computer processing jobs that have stages and precedence constraints among the stages' [patent_app_type] => utility [patent_app_number] => 11/241720 [patent_app_country] => US [patent_app_date] => 2005-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3456 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11241720 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/241720
Scheduling computer processing jobs that have stages and precedence constraints among the stages Sep 28, 2005 Issued
Array ( [id] => 49147 [patent_doc_number] => 07779412 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-17 [patent_title] => 'Task scheduling method for low power dissipation in a system chip' [patent_app_type] => utility [patent_app_number] => 11/228283 [patent_app_country] => US [patent_app_date] => 2005-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4085 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/779/07779412.pdf [firstpage_image] =>[orig_patent_app_number] => 11228283 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/228283
Task scheduling method for low power dissipation in a system chip Sep 18, 2005 Issued
Array ( [id] => 5728728 [patent_doc_number] => 20060059489 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-16 [patent_title] => 'Parallel processing system, interconnection network, node and network control method, and program therefor' [patent_app_type] => utility [patent_app_number] => 11/227107 [patent_app_country] => US [patent_app_date] => 2005-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7808 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20060059489.pdf [firstpage_image] =>[orig_patent_app_number] => 11227107 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/227107
Parallel processing system, interconnection network, node and network control method, and program therefor Sep 15, 2005 Abandoned
Array ( [id] => 8297526 [patent_doc_number] => 08225327 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-17 [patent_title] => 'Synchronizing access to a shared resource utilizing selective locking' [patent_app_type] => utility [patent_app_number] => 11/227032 [patent_app_country] => US [patent_app_date] => 2005-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4557 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11227032 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/227032
Synchronizing access to a shared resource utilizing selective locking Sep 14, 2005 Issued
Array ( [id] => 9049462 [patent_doc_number] => 08544020 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-09-24 [patent_title] => 'Cooperative preemption' [patent_app_type] => utility [patent_app_number] => 11/228034 [patent_app_country] => US [patent_app_date] => 2005-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 3997 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11228034 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/228034
Cooperative preemption Sep 13, 2005 Issued
Array ( [id] => 59018 [patent_doc_number] => 07770177 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-03 [patent_title] => 'System for memory reclamation based on thread entry and release request times' [patent_app_type] => utility [patent_app_number] => 11/217494 [patent_app_country] => US [patent_app_date] => 2005-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 20 [patent_no_of_words] => 11424 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 316 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/770/07770177.pdf [firstpage_image] =>[orig_patent_app_number] => 11217494 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/217494
System for memory reclamation based on thread entry and release request times Sep 1, 2005 Issued
Array ( [id] => 8678915 [patent_doc_number] => 08387052 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-26 [patent_title] => 'Adaptive partitioning for operating system' [patent_app_type] => utility [patent_app_number] => 11/216795 [patent_app_country] => US [patent_app_date] => 2005-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7485 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 396 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11216795 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/216795
Adaptive partitioning for operating system Aug 30, 2005 Issued
Array ( [id] => 5701870 [patent_doc_number] => 20060218555 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-28 [patent_title] => 'Plan executing apparatus, method of plan execution, and computer program product therefor' [patent_app_type] => utility [patent_app_number] => 11/213891 [patent_app_country] => US [patent_app_date] => 2005-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 10816 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0218/20060218555.pdf [firstpage_image] =>[orig_patent_app_number] => 11213891 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/213891
Plan executing apparatus, method of plan execution, and computer program product therefor Aug 29, 2005 Issued
Array ( [id] => 5150711 [patent_doc_number] => 20070050771 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-01 [patent_title] => 'System and method for scheduling tasks for execution' [patent_app_type] => utility [patent_app_number] => 11/214604 [patent_app_country] => US [patent_app_date] => 2005-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4123 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0050/20070050771.pdf [firstpage_image] =>[orig_patent_app_number] => 11214604 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/214604
System and method for scheduling tasks for execution Aug 29, 2005 Issued
Array ( [id] => 5058891 [patent_doc_number] => 20070061813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-15 [patent_title] => 'Distributed embedded software for a switch' [patent_app_type] => utility [patent_app_number] => 11/215877 [patent_app_country] => US [patent_app_date] => 2005-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6313 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0061/20070061813.pdf [firstpage_image] =>[orig_patent_app_number] => 11215877 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/215877
Distributed embedded software for a switch Aug 29, 2005 Abandoned
Array ( [id] => 107174 [patent_doc_number] => 07730491 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-01 [patent_title] => 'Fair scalable reader-writer mutual exclusion' [patent_app_type] => utility [patent_app_number] => 11/215863 [patent_app_country] => US [patent_app_date] => 2005-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6286 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/730/07730491.pdf [firstpage_image] =>[orig_patent_app_number] => 11215863 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/215863
Fair scalable reader-writer mutual exclusion Aug 29, 2005 Issued
Array ( [id] => 5150704 [patent_doc_number] => 20070050764 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-01 [patent_title] => 'Hierarchical virtualization with a multi-level virtualization mechanism' [patent_app_type] => utility [patent_app_number] => 11/215380 [patent_app_country] => US [patent_app_date] => 2005-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5669 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0050/20070050764.pdf [firstpage_image] =>[orig_patent_app_number] => 11215380 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/215380
Hierarchical virtualization with a multi-level virtualization mechanism Aug 29, 2005 Issued
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