Search

Michael Eugene La Villa

Examiner (ID: 10677, Phone: (571)272-1539 , Office: P/1784 )

Most Active Art Unit
1784
Art Unit(s)
4132, 1794, 1784, 1773, 1316, 1754, 3623, 1775
Total Applications
1629
Issued Applications
1144
Pending Applications
115
Abandoned Applications
394

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18363526 [patent_doc_number] => 20230145117 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-11 [patent_title] => FLASH MEMORY DEVICE HAVING MULTI-STACK STRUCTURE AND CHANNEL SEPARATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/982081 [patent_app_country] => US [patent_app_date] => 2022-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8889 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17982081 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/982081
Flash memory device having multi-stack structure and channel separation method thereof Nov 6, 2022 Issued
Array ( [id] => 18239639 [patent_doc_number] => 20230071950 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-09 [patent_title] => MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/981469 [patent_app_country] => US [patent_app_date] => 2022-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11541 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17981469 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/981469
Memory device Nov 5, 2022 Issued
Array ( [id] => 19812208 [patent_doc_number] => 12243617 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-04 [patent_title] => Loopback circuit for low-power memory devices [patent_app_type] => utility [patent_app_number] => 18/051143 [patent_app_country] => US [patent_app_date] => 2022-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6533 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18051143 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/051143
Loopback circuit for low-power memory devices Oct 30, 2022 Issued
Array ( [id] => 18224038 [patent_doc_number] => 20230063032 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => INTEGRATED CIRCUIT AND STATIC RANDOM ACCESS MEMORY THEREOF [patent_app_type] => utility [patent_app_number] => 17/976317 [patent_app_country] => US [patent_app_date] => 2022-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15761 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17976317 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/976317
Integrated circuit and static random access memory thereof Oct 27, 2022 Issued
Array ( [id] => 18256049 [patent_doc_number] => 20230083088 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-16 [patent_title] => MEMORY CIRCUIT AND WRITE METHOD [patent_app_type] => utility [patent_app_number] => 18/050779 [patent_app_country] => US [patent_app_date] => 2022-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12516 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18050779 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/050779
Memory circuit and write method Oct 27, 2022 Issued
Array ( [id] => 19509423 [patent_doc_number] => 12120864 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-15 [patent_title] => Memory device using semiconductor element [patent_app_type] => utility [patent_app_number] => 17/970836 [patent_app_country] => US [patent_app_date] => 2022-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 31 [patent_no_of_words] => 11845 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 623 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17970836 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/970836
Memory device using semiconductor element Oct 20, 2022 Issued
Array ( [id] => 19116118 [patent_doc_number] => 20240127868 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-18 [patent_title] => SINGLE ENDED SENSE AMPLIFIER WITH CURRENT PULSE CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/046961 [patent_app_country] => US [patent_app_date] => 2022-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4147 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18046961 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/046961
Single ended sense amplifier with current pulse circuit Oct 16, 2022 Issued
Array ( [id] => 18168615 [patent_doc_number] => 20230035225 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-02 [patent_title] => MEMORY DEVICE AND PROGRAM OPERATION THEREOF [patent_app_type] => utility [patent_app_number] => 17/967509 [patent_app_country] => US [patent_app_date] => 2022-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12238 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17967509 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/967509
Memory device and program operation thereof Oct 16, 2022 Issued
Array ( [id] => 20242678 [patent_doc_number] => 12422996 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-23 [patent_title] => Controller for controlling one-time programmable memory, system, and operation method thereof [patent_app_type] => utility [patent_app_number] => 18/045753 [patent_app_country] => US [patent_app_date] => 2022-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4672 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18045753 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/045753
Controller for controlling one-time programmable memory, system, and operation method thereof Oct 10, 2022 Issued
Array ( [id] => 18170534 [patent_doc_number] => 20230037145 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-02 [patent_title] => MEMORY WITH PROGRAMMABLE DIE REFRESH STAGGER [patent_app_type] => utility [patent_app_number] => 17/962188 [patent_app_country] => US [patent_app_date] => 2022-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10392 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17962188 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/962188
Memory with programmable die refresh stagger Oct 6, 2022 Issued
Array ( [id] => 18365425 [patent_doc_number] => 20230147016 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-11 [patent_title] => APPARATUS, MEMORY DEVICE, AND METHOD FOR MULTI-PHASE CLOCK TRAINING [patent_app_type] => utility [patent_app_number] => 17/959663 [patent_app_country] => US [patent_app_date] => 2022-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10986 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17959663 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/959663
Apparatus, memory device, and method for multi-phase clock training Oct 3, 2022 Issued
Array ( [id] => 19582372 [patent_doc_number] => 12148498 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-19 [patent_title] => Post package repair management [patent_app_type] => utility [patent_app_number] => 17/959191 [patent_app_country] => US [patent_app_date] => 2022-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5980 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17959191 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/959191
Post package repair management Oct 2, 2022 Issued
Array ( [id] => 19062895 [patent_doc_number] => 11942140 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-26 [patent_title] => Nonvolatile memory devices [patent_app_type] => utility [patent_app_number] => 17/958386 [patent_app_country] => US [patent_app_date] => 2022-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 30 [patent_no_of_words] => 20985 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 327 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17958386 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/958386
Nonvolatile memory devices Sep 30, 2022 Issued
Array ( [id] => 18280655 [patent_doc_number] => 20230096127 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => RESISTIVE RANDOM-ACCESS MEMORY (RERAM) CELL OPTIMIZED FOR RESET AND SET CURRENTS [patent_app_type] => utility [patent_app_number] => 17/937186 [patent_app_country] => US [patent_app_date] => 2022-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4721 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17937186 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/937186
Resistive random-access memory (ReRAM) cell optimized for reset and set currents Sep 29, 2022 Issued
Array ( [id] => 18935237 [patent_doc_number] => 11887675 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-30 [patent_title] => Random telegraph signal noise reduction scheme for semiconductor memories [patent_app_type] => utility [patent_app_number] => 17/936445 [patent_app_country] => US [patent_app_date] => 2022-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 22 [patent_no_of_words] => 9050 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17936445 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/936445
Random telegraph signal noise reduction scheme for semiconductor memories Sep 28, 2022 Issued
Array ( [id] => 19720124 [patent_doc_number] => 12205667 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-21 [patent_title] => Multi-die package [patent_app_type] => utility [patent_app_number] => 17/954343 [patent_app_country] => US [patent_app_date] => 2022-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2401 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 272 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17954343 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/954343
Multi-die package Sep 27, 2022 Issued
Array ( [id] => 19070822 [patent_doc_number] => 20240105248 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-28 [patent_title] => TCAM WITH HYSTERETIC OXIDE MEMORY CELLS [patent_app_type] => utility [patent_app_number] => 17/955194 [patent_app_country] => US [patent_app_date] => 2022-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10340 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17955194 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/955194
TCAM WITH HYSTERETIC OXIDE MEMORY CELLS Sep 27, 2022 Pending
Array ( [id] => 19507631 [patent_doc_number] => 12119060 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-15 [patent_title] => Content-addressable memory and electronic device including the same [patent_app_type] => utility [patent_app_number] => 17/953491 [patent_app_country] => US [patent_app_date] => 2022-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7783 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17953491 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/953491
Content-addressable memory and electronic device including the same Sep 26, 2022 Issued
Array ( [id] => 19413664 [patent_doc_number] => 12079482 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-03 [patent_title] => Memory device [patent_app_type] => utility [patent_app_number] => 17/934691 [patent_app_country] => US [patent_app_date] => 2022-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 18 [patent_no_of_words] => 9044 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17934691 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/934691
Memory device Sep 22, 2022 Issued
Array ( [id] => 18144454 [patent_doc_number] => 20230018305 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => NONVOLATILE MEMORY DEVICE AND METHOD OF OPERATING A NONVOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 17/947320 [patent_app_country] => US [patent_app_date] => 2022-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15071 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 293 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17947320 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/947320
Nonvolatile memory device and method of operating a nonvolatile memory Sep 18, 2022 Issued
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