Search

Michael J Cross

Examiner (ID: 4148, Phone: (571)270-7549 , Office: P/3621 )

Most Active Art Unit
3621
Art Unit(s)
3621, 3682, 3681
Total Applications
232
Issued Applications
43
Pending Applications
0
Abandoned Applications
188

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10228493 [patent_doc_number] => 20150113486 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-23 [patent_title] => 'ENHANCED OPTICAL PROXIMITY CORRECTION (OPC) METHOD AND SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/508022 [patent_app_country] => US [patent_app_date] => 2014-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3655 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14508022 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/508022
Enhanced optical proximity correction (OPC) method and system Oct 6, 2014 Issued
Array ( [id] => 11067047 [patent_doc_number] => 20160264011 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-15 [patent_title] => 'VEHICLE CHARGING STAND MANAGEMENT SYSTEM' [patent_app_type] => utility [patent_app_number] => 15/027404 [patent_app_country] => US [patent_app_date] => 2014-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5080 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15027404 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/027404
VEHICLE CHARGING STAND MANAGEMENT SYSTEM Oct 1, 2014 Abandoned
Array ( [id] => 11035308 [patent_doc_number] => 20160232264 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-11 [patent_title] => 'FIRST PRINCIPLES DESIGN AUTOMATION TOOL' [patent_app_type] => utility [patent_app_number] => 15/021655 [patent_app_country] => US [patent_app_date] => 2014-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 14682 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15021655 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/021655
First principles design automation tool Sep 25, 2014 Issued
Array ( [id] => 10569478 [patent_doc_number] => 09292648 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-03-22 [patent_title] => 'Activity-driven capacitance reduction to reduce dynamic power consumption in an integrated circuit' [patent_app_type] => utility [patent_app_number] => 14/492923 [patent_app_country] => US [patent_app_date] => 2014-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4363 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14492923 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/492923
Activity-driven capacitance reduction to reduce dynamic power consumption in an integrated circuit Sep 21, 2014 Issued
Array ( [id] => 10739750 [patent_doc_number] => 20160085901 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-24 [patent_title] => 'LINEAR COMPLEXITY PRIORITIZATION OF TIMING ENGINEERING CHANGE ORDER FAILURES' [patent_app_type] => utility [patent_app_number] => 14/491808 [patent_app_country] => US [patent_app_date] => 2014-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6469 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14491808 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/491808
Linear complexity prioritization of timing engineering change order failures Sep 18, 2014 Issued
Array ( [id] => 10530567 [patent_doc_number] => 09256703 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-02-09 [patent_title] => 'Method of detecting a scattering bar by simulation' [patent_app_type] => utility [patent_app_number] => 14/491732 [patent_app_country] => US [patent_app_date] => 2014-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 11 [patent_no_of_words] => 5562 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14491732 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/491732
Method of detecting a scattering bar by simulation Sep 18, 2014 Issued
Array ( [id] => 10382287 [patent_doc_number] => 20150267294 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-24 [patent_title] => 'SUBSTRATE PROCESSING APPARATUS, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND COMPUTER-READABLE RECORDING MEDIUM' [patent_app_type] => utility [patent_app_number] => 14/482447 [patent_app_country] => US [patent_app_date] => 2014-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 14622 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14482447 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/482447
Substrate processing apparatus, method for manufacturing semiconductor device and computer-readable recording medium Sep 9, 2014 Issued
Array ( [id] => 9912423 [patent_doc_number] => 20150067626 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-05 [patent_title] => 'KNOWLEDGE-BASED ANALOG LAYOUT GENERATOR' [patent_app_type] => utility [patent_app_number] => 14/476320 [patent_app_country] => US [patent_app_date] => 2014-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 9125 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14476320 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/476320
Knowledge-based analog layout generator Sep 2, 2014 Issued
Array ( [id] => 13055567 [patent_doc_number] => 10049176 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-14 [patent_title] => Method for determining characteristics of holes to be provided through a plate and corresponding programme [patent_app_type] => utility [patent_app_number] => 14/914900 [patent_app_country] => US [patent_app_date] => 2014-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 5401 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 478 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14914900 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/914900
Method for determining characteristics of holes to be provided through a plate and corresponding programme Aug 28, 2014 Issued
Array ( [id] => 11029305 [patent_doc_number] => 20160226261 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-04 [patent_title] => 'Power Supply-Demand Adjusting Apparatus, Power System and Power Supply-Demand Adjusting Method' [patent_app_type] => utility [patent_app_number] => 14/917422 [patent_app_country] => US [patent_app_date] => 2014-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 10047 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14917422 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/917422
Power supply-demand adjusting apparatus, power system and power supply-demand adjusting method Aug 25, 2014 Issued
Array ( [id] => 12253749 [patent_doc_number] => 09925883 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-03-27 [patent_title] => 'Automatic self-locating transmit coil for wireless vehicle charging' [patent_app_type] => utility [patent_app_number] => 14/467833 [patent_app_country] => US [patent_app_date] => 2014-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 6689 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14467833 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/467833
Automatic self-locating transmit coil for wireless vehicle charging Aug 24, 2014 Issued
Array ( [id] => 10462644 [patent_doc_number] => 20150347659 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-03 [patent_title] => 'SYSTEM AND METHOD OF LAYOUT DESIGN FOR INTEGRATED CIRCUITS' [patent_app_type] => utility [patent_app_number] => 14/464407 [patent_app_country] => US [patent_app_date] => 2014-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 8685 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14464407 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/464407
System and method of layout design for integrated circuits Aug 19, 2014 Issued
Array ( [id] => 10948752 [patent_doc_number] => 20140351773 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-27 [patent_title] => 'MODEL-BASED PROCESS SIMULATION SYSTEMS AND METHODS' [patent_app_type] => utility [patent_app_number] => 14/456586 [patent_app_country] => US [patent_app_date] => 2014-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9845 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14456586 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/456586
Model-based process simulation systems and methods Aug 10, 2014 Issued
Array ( [id] => 10085491 [patent_doc_number] => 09122839 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-01 [patent_title] => 'Layout modification method and system' [patent_app_type] => utility [patent_app_number] => 14/449211 [patent_app_country] => US [patent_app_date] => 2014-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 6321 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14449211 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/449211
Layout modification method and system Jul 31, 2014 Issued
Array ( [id] => 10673185 [patent_doc_number] => 20160019329 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-21 [patent_title] => 'INTERLACED BI-SENSOR SUPER-RESOLUTION ENHANCEMENT' [patent_app_type] => utility [patent_app_number] => 14/334249 [patent_app_country] => US [patent_app_date] => 2014-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3792 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14334249 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/334249
Interlaced bi-sensor super-resolution enhancement Jul 16, 2014 Issued
Array ( [id] => 10673184 [patent_doc_number] => 20160019330 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-21 [patent_title] => 'THERMAL UNIFORMITY COMPENSATING METHOD AND APPARATUS' [patent_app_type] => utility [patent_app_number] => 14/333919 [patent_app_country] => US [patent_app_date] => 2014-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2994 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14333919 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/333919
Thermal uniformity compensating method and apparatus Jul 16, 2014 Issued
Array ( [id] => 9814706 [patent_doc_number] => 20150026651 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-22 [patent_title] => 'PREVENTING DOUBLE PATTERNING ODD CYCLES' [patent_app_type] => utility [patent_app_number] => 14/328386 [patent_app_country] => US [patent_app_date] => 2014-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8750 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14328386 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/328386
Preventing double patterning odd cycles Jul 9, 2014 Issued
Array ( [id] => 10243108 [patent_doc_number] => 20150128102 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-07 [patent_title] => 'CIRCUIT DESIGN SYNTHESIS TOOL WITH EXPORT TO A COMPUTER-AIDED DESIGN FORMAT' [patent_app_type] => utility [patent_app_number] => 14/327317 [patent_app_country] => US [patent_app_date] => 2014-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 21148 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14327317 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/327317
Circuit design synthesis tool with export to a computer-aided design format Jul 8, 2014 Issued
Array ( [id] => 10131267 [patent_doc_number] => 09165103 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-10-20 [patent_title] => 'Methods, systems, and articles of manufacture for tessellating and labeling routing space for routing electronic designs' [patent_app_type] => utility [patent_app_number] => 14/318507 [patent_app_country] => US [patent_app_date] => 2014-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 21 [patent_no_of_words] => 15463 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14318507 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/318507
Methods, systems, and articles of manufacture for tessellating and labeling routing space for routing electronic designs Jun 26, 2014 Issued
Array ( [id] => 10569476 [patent_doc_number] => 09292646 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-22 [patent_title] => 'Integrated circuit design system with balanced color assignment' [patent_app_type] => utility [patent_app_number] => 14/307948 [patent_app_country] => US [patent_app_date] => 2014-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7914 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 334 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14307948 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/307948
Integrated circuit design system with balanced color assignment Jun 17, 2014 Issued
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