Michael J Cross
Examiner (ID: 4148, Phone: (571)270-7549 , Office: P/3621 )
Most Active Art Unit | 3621 |
Art Unit(s) | 3621, 3682, 3681 |
Total Applications | 232 |
Issued Applications | 43 |
Pending Applications | 0 |
Abandoned Applications | 188 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 9683124
[patent_doc_number] => 20140239887
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-08-28
[patent_title] => 'BATTERY CHARGER'
[patent_app_type] => utility
[patent_app_number] => 14/349611
[patent_app_country] => US
[patent_app_date] => 2012-09-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 4314
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14349611
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/349611 | Battery charger | Sep 18, 2012 | Issued |
Array
(
[id] => 10439495
[patent_doc_number] => 20150324507
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-11-12
[patent_title] => 'PRINTED CIRCUIT BOARD DESIGN VERIFICATION SYSTEM, PRINTED CIRCUIT BOARD DESIGN VERIFICATION METHOD, AND RECORDING MEDIUM'
[patent_app_type] => utility
[patent_app_number] => 14/411996
[patent_app_country] => US
[patent_app_date] => 2012-09-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 33
[patent_figures_cnt] => 33
[patent_no_of_words] => 21532
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14411996
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/411996 | PRINTED CIRCUIT BOARD DESIGN VERIFICATION SYSTEM, PRINTED CIRCUIT BOARD DESIGN VERIFICATION METHOD, AND RECORDING MEDIUM | Sep 12, 2012 | Abandoned |
Array
(
[id] => 8899596
[patent_doc_number] => 08479130
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2013-07-02
[patent_title] => 'Method of designing integrated circuit that accounts for device aging'
[patent_app_type] => utility
[patent_app_number] => 13/607787
[patent_app_country] => US
[patent_app_date] => 2012-09-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 3583
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 304
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13607787
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/607787 | Method of designing integrated circuit that accounts for device aging | Sep 8, 2012 | Issued |
Array
(
[id] => 9130357
[patent_doc_number] => 08578314
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2013-11-05
[patent_title] => 'Circuit design with growable capacitor arrays'
[patent_app_type] => utility
[patent_app_number] => 13/604814
[patent_app_country] => US
[patent_app_date] => 2012-09-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 11
[patent_no_of_words] => 8578
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13604814
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/604814 | Circuit design with growable capacitor arrays | Sep 5, 2012 | Issued |
Array
(
[id] => 9023650
[patent_doc_number] => 08533649
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-09-10
[patent_title] => 'Reducing leakage power in integrated circuit designs'
[patent_app_type] => utility
[patent_app_number] => 13/597227
[patent_app_country] => US
[patent_app_date] => 2012-08-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 12
[patent_no_of_words] => 7067
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 183
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13597227
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/597227 | Reducing leakage power in integrated circuit designs | Aug 27, 2012 | Issued |
Array
(
[id] => 10895117
[patent_doc_number] => 08918748
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2014-12-23
[patent_title] => 'M/A for performing automatic latency optimization on system designs for implementation on programmable hardware'
[patent_app_type] => utility
[patent_app_number] => 13/593665
[patent_app_country] => US
[patent_app_date] => 2012-08-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 8560
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13593665
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/593665 | M/A for performing automatic latency optimization on system designs for implementation on programmable hardware | Aug 23, 2012 | Issued |
Array
(
[id] => 8681402
[patent_doc_number] => 20130049686
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-02-28
[patent_title] => 'CONTROL CIRCUIT FOR LIMITING A LOAD CURRENT, CHARGING CIRCUIT AND MOTOR VEHICLE'
[patent_app_type] => utility
[patent_app_number] => 13/592572
[patent_app_country] => US
[patent_app_date] => 2012-08-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6582
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13592572
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/592572 | Control circuit for limiting a load current, charging circuit and motor vehicle | Aug 22, 2012 | Issued |
Array
(
[id] => 9328305
[patent_doc_number] => 20140055087
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-02-27
[patent_title] => 'Methods, Systems, and Products for Charging of Devices'
[patent_app_type] => utility
[patent_app_number] => 13/592577
[patent_app_country] => US
[patent_app_date] => 2012-08-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 27
[patent_no_of_words] => 8765
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13592577
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/592577 | Methods, systems, and products for charging of devices | Aug 22, 2012 | Issued |
Array
(
[id] => 9029834
[patent_doc_number] => 08539432
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-09-17
[patent_title] => 'Computer product, circuit design method and apparatus for designing electronic apparatus in which multiple printed-circuit boards are mounted'
[patent_app_type] => utility
[patent_app_number] => 13/591844
[patent_app_country] => US
[patent_app_date] => 2012-08-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 28
[patent_no_of_words] => 10165
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 214
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13591844
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/591844 | Computer product, circuit design method and apparatus for designing electronic apparatus in which multiple printed-circuit boards are mounted | Aug 21, 2012 | Issued |
Array
(
[id] => 10513111
[patent_doc_number] => 09240691
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-01-19
[patent_title] => 'System, method, and computer program product for remedying a charging error'
[patent_app_type] => utility
[patent_app_number] => 13/592255
[patent_app_country] => US
[patent_app_date] => 2012-08-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3497
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 162
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13592255
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/592255 | System, method, and computer program product for remedying a charging error | Aug 21, 2012 | Issued |
Array
(
[id] => 8682820
[patent_doc_number] => 20130051104
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-02-28
[patent_title] => 'Battery Adapter and Power Source Device Employing Same'
[patent_app_type] => utility
[patent_app_number] => 13/592111
[patent_app_country] => US
[patent_app_date] => 2012-08-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 21
[patent_no_of_words] => 15694
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13592111
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/592111 | Battery Adapter and Power Source Device Employing Same | Aug 21, 2012 | Abandoned |
Array
(
[id] => 9328299
[patent_doc_number] => 20140055081
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-02-27
[patent_title] => 'POWER MANAGEMENT SYSTEM THAT CHANGES THE OPERATING CONDITIONS OF A BATTERY CHARGER'
[patent_app_type] => utility
[patent_app_number] => 13/591595
[patent_app_country] => US
[patent_app_date] => 2012-08-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 1702
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13591595
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/591595 | Power management system that changes the operating conditions of a battery charger | Aug 21, 2012 | Issued |
Array
(
[id] => 9320784
[patent_doc_number] => 20140053122
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-02-20
[patent_title] => 'METHOD FOR ADJUSTING A LAYOUT OF AN INTEGRATED CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 13/589194
[patent_app_country] => US
[patent_app_date] => 2012-08-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 6128
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13589194
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/589194 | METHOD FOR ADJUSTING A LAYOUT OF AN INTEGRATED CIRCUIT | Aug 19, 2012 | Abandoned |
Array
(
[id] => 8799640
[patent_doc_number] => 08438529
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2013-05-07
[patent_title] => 'Computing device and method for checking signal transmission line'
[patent_app_type] => utility
[patent_app_number] => 13/585854
[patent_app_country] => US
[patent_app_date] => 2012-08-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 1039
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 174
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13585854
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/585854 | Computing device and method for checking signal transmission line | Aug 14, 2012 | Issued |
Array
(
[id] => 8935816
[patent_doc_number] => 08495538
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2013-07-23
[patent_title] => 'Power estimation of a circuit design'
[patent_app_type] => utility
[patent_app_number] => 13/585564
[patent_app_country] => US
[patent_app_date] => 2012-08-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 4935
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 210
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13585564
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/585564 | Power estimation of a circuit design | Aug 13, 2012 | Issued |
Array
(
[id] => 8661387
[patent_doc_number] => 20130042216
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-02-14
[patent_title] => 'Row Based Analog Standard Cell Layout Design and Methodology'
[patent_app_type] => utility
[patent_app_number] => 13/572697
[patent_app_country] => US
[patent_app_date] => 2012-08-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 6141
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13572697
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/572697 | Row based analog standard cell layout design and methodology | Aug 12, 2012 | Issued |
Array
(
[id] => 9632307
[patent_doc_number] => 20140210415
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-07-31
[patent_title] => 'EQUALIZATION CIRCUIT, POWER SUPPLY SYSTEM, AND VEHICLE'
[patent_app_type] => utility
[patent_app_number] => 14/238164
[patent_app_country] => US
[patent_app_date] => 2012-08-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 8046
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14238164
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/238164 | Equalization circuit, power supply system, and vehicle | Aug 1, 2012 | Issued |
Array
(
[id] => 9283194
[patent_doc_number] => 20140033162
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-01-30
[patent_title] => 'DETERMINING OPTIMAL GATE SIZES BY USING A NUMERICAL SOLVER'
[patent_app_type] => utility
[patent_app_number] => 13/562189
[patent_app_country] => US
[patent_app_date] => 2012-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6650
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13562189
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/562189 | Determining optimal gate sizes by using a numerical solver | Jul 29, 2012 | Issued |
Array
(
[id] => 13070261
[patent_doc_number] => 10055911
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-08-21
[patent_title] => Apparatus, method and article for authentication, security and control of power storage devices, such as batteries, based on user profiles
[patent_app_type] => utility
[patent_app_number] => 13/559010
[patent_app_country] => US
[patent_app_date] => 2012-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 11
[patent_no_of_words] => 12674
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 231
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13559010
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/559010 | Apparatus, method and article for authentication, security and control of power storage devices, such as batteries, based on user profiles | Jul 25, 2012 | Issued |
Array
(
[id] => 10115248
[patent_doc_number] => 09150114
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-10-06
[patent_title] => 'Storage system'
[patent_app_type] => utility
[patent_app_number] => 13/558925
[patent_app_country] => US
[patent_app_date] => 2012-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5660
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 263
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13558925
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/558925 | Storage system | Jul 25, 2012 | Issued |