Search

Michael J. Hayes

Supervisory Patent Examiner (ID: 11137, Phone: (571)272-4959 , Office: P/3700 )

Most Active Art Unit
3763
Art Unit(s)
2832, 3763, 3734, 3767, 3762
Total Applications
566
Issued Applications
392
Pending Applications
81
Abandoned Applications
93

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17933286 [patent_doc_number] => 20220328412 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-13 [patent_title] => SEMICONDUCTOR PACKAGES [patent_app_type] => utility [patent_app_number] => 17/844337 [patent_app_country] => US [patent_app_date] => 2022-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8737 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17844337 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/844337
Semiconductor packages Jun 19, 2022 Issued
Array ( [id] => 16578748 [patent_doc_number] => 20210013149 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-14 [patent_title] => STANDARD CELL AND AN INTEGRATED CIRCUIT INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 17/037569 [patent_app_country] => US [patent_app_date] => 2020-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10362 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17037569 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/037569
Standard cell and an integrated circuit including the same Sep 28, 2020 Issued
Array ( [id] => 17130361 [patent_doc_number] => 20210305130 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-30 [patent_title] => INTEGRATED CIRCUIT SEMICONDUCTOR DEVICE INCLUDING THROUGH SILICON VIA [patent_app_type] => utility [patent_app_number] => 17/036145 [patent_app_country] => US [patent_app_date] => 2020-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10328 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17036145 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/036145
Integrated circuit semiconductor device including through silicon via Sep 28, 2020 Issued
Array ( [id] => 19294632 [patent_doc_number] => 12033997 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-09 [patent_title] => Standard cell having power rails disposed in central region thereof and standard cell block [patent_app_type] => utility [patent_app_number] => 17/035619 [patent_app_country] => US [patent_app_date] => 2020-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 9302 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 264 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17035619 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/035619
Standard cell having power rails disposed in central region thereof and standard cell block Sep 27, 2020 Issued
Array ( [id] => 19369771 [patent_doc_number] => 12061856 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-13 [patent_title] => Semiconductor device including combination rows and method and system for generating layout diagram of same [patent_app_type] => utility [patent_app_number] => 17/023286 [patent_app_country] => US [patent_app_date] => 2020-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 12644 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17023286 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/023286
Semiconductor device including combination rows and method and system for generating layout diagram of same Sep 15, 2020 Issued
Array ( [id] => 16715707 [patent_doc_number] => 20210082854 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-18 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/937820 [patent_app_country] => US [patent_app_date] => 2020-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6572 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16937820 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/937820
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE Jul 23, 2020 Abandoned
Array ( [id] => 17203543 [patent_doc_number] => 20210343638 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-04 [patent_title] => SENSOR PACKAGE AND METHOD [patent_app_type] => utility [patent_app_number] => 16/865806 [patent_app_country] => US [patent_app_date] => 2020-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10755 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16865806 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/865806
Sensor package and method May 3, 2020 Issued
Array ( [id] => 16781721 [patent_doc_number] => 20210118800 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-22 [patent_title] => SEMICONDUCTOR PACKAGES [patent_app_type] => utility [patent_app_number] => 16/863559 [patent_app_country] => US [patent_app_date] => 2020-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8719 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16863559 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/863559
SEMICONDUCTOR PACKAGES Apr 29, 2020 Abandoned
Array ( [id] => 18669982 [patent_doc_number] => 11776894 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-03 [patent_title] => Semiconductor chip including low-k dielectric layer [patent_app_type] => utility [patent_app_number] => 16/848246 [patent_app_country] => US [patent_app_date] => 2020-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 45 [patent_no_of_words] => 15099 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16848246 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/848246
Semiconductor chip including low-k dielectric layer Apr 13, 2020 Issued
Array ( [id] => 17145250 [patent_doc_number] => 20210313263 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-07 [patent_title] => SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 16/837918 [patent_app_country] => US [patent_app_date] => 2020-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7146 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16837918 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/837918
Semiconductor devices having power rails and signal tracks arranged in different layer Mar 31, 2020 Issued
Array ( [id] => 16272342 [patent_doc_number] => 20200273830 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-27 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/792518 [patent_app_country] => US [patent_app_date] => 2020-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12799 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16792518 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/792518
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME Feb 16, 2020 Abandoned
Array ( [id] => 16995421 [patent_doc_number] => 20210233841 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-29 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/752925 [patent_app_country] => US [patent_app_date] => 2020-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9116 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16752925 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/752925
SEMICONDUCTOR DEVICE Jan 26, 2020 Abandoned
Array ( [id] => 19229630 [patent_doc_number] => 12009273 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-11 [patent_title] => Semiconductor apparatus including different thermal resistance values for different heat transfer paths [patent_app_type] => utility [patent_app_number] => 16/749886 [patent_app_country] => US [patent_app_date] => 2020-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 10902 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 319 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16749886 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/749886
Semiconductor apparatus including different thermal resistance values for different heat transfer paths Jan 21, 2020 Issued
Array ( [id] => 19229675 [patent_doc_number] => 12009319 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-11 [patent_title] => Integrated circuit with metal stop ring outside the scribe seal [patent_app_type] => utility [patent_app_number] => 16/737237 [patent_app_country] => US [patent_app_date] => 2020-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3759 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16737237 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/737237
Integrated circuit with metal stop ring outside the scribe seal Jan 7, 2020 Issued
Array ( [id] => 16163123 [patent_doc_number] => 20200219794 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-09 [patent_title] => MULTI-LAYER SUBSTRATE AND METHOD FOR MANUFACTURING MULTI-LAYER SUBSTRATE [patent_app_type] => utility [patent_app_number] => 16/728051 [patent_app_country] => US [patent_app_date] => 2019-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6009 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16728051 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/728051
Multi-layer substrate and method for manufacturing multi-layer substrate Dec 26, 2019 Issued
Array ( [id] => 16904845 [patent_doc_number] => 20210183761 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-17 [patent_title] => LINE PATTERNING IN INTEGRATED CIRCUIT DEVICES [patent_app_type] => utility [patent_app_number] => 16/713867 [patent_app_country] => US [patent_app_date] => 2019-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11668 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16713867 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/713867
LINE PATTERNING IN INTEGRATED CIRCUIT DEVICES Dec 12, 2019 Abandoned
Array ( [id] => 16081057 [patent_doc_number] => 20200194515 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-18 [patent_title] => SENSOR PACKAGE MODULE AND ORGANIC LIGHT-EMITTING DISPLAY DEVICE HAVING SAME [patent_app_type] => utility [patent_app_number] => 16/711208 [patent_app_country] => US [patent_app_date] => 2019-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7229 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16711208 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/711208
Sensor package module and organic light-emitting display device having same Dec 10, 2019 Issued
Array ( [id] => 18919255 [patent_doc_number] => 11881546 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-23 [patent_title] => Device with light-emitting diode [patent_app_type] => utility [patent_app_number] => 16/705203 [patent_app_country] => US [patent_app_date] => 2019-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3626 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16705203 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/705203
Device with light-emitting diode Dec 4, 2019 Issued
Array ( [id] => 16858707 [patent_doc_number] => 20210159452 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-27 [patent_title] => OLED DISPLAY DEVICES WITH SURFACES OF DIFFERENT WETTABILITY FOR DEPOSITION OF LIGHT ENHANCING LAYER [patent_app_type] => utility [patent_app_number] => 16/696949 [patent_app_country] => US [patent_app_date] => 2019-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6757 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16696949 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/696949
OLED DISPLAY DEVICES WITH SURFACES OF DIFFERENT WETTABILITY FOR DEPOSITION OF LIGHT ENHANCING LAYER Nov 25, 2019 Abandoned
Array ( [id] => 18593445 [patent_doc_number] => 11742357 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-29 [patent_title] => Display device [patent_app_type] => utility [patent_app_number] => 16/685061 [patent_app_country] => US [patent_app_date] => 2019-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7077 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 323 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16685061 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/685061
Display device Nov 14, 2019 Issued
Menu