Michael J. Kyle

Array ( [id] => 8713840 [patent_doc_number] => 08399981 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-19 [patent_title] => 'Ball grid array with improved single-ended and differential signal performance' [patent_app_type] => utility [patent_app_number] => 13/614102 [patent_app_country] => US [patent_app_date] => 2012-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 21 [patent_no_of_words] => 4756 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13614102 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8287458 [patent_doc_number] => 20120175786 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-12 [patent_title] => 'METHOD OF POST-MOLD GRINDING A SEMICONDUCTOR PACKAGE' [patent_app_type] => utility [patent_app_number] => 13/345836 [patent_app_country] => US [patent_app_date] => 2012-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2136 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13345836 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8486900 [patent_doc_number] => 20120286307 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-15 [patent_title] => 'SEMICONDUCTOR LIGHT EMITTING STRUCTURE' [patent_app_type] => utility [patent_app_number] => 13/225171 [patent_app_country] => US [patent_app_date] => 2011-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2705 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13225171 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8738756 [patent_doc_number] => 08410527 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-02 [patent_title] => 'Electrical fuse device based on a phase-change memory element and corresponding programming method' [patent_app_type] => utility [patent_app_number] => 13/212080 [patent_app_country] => US [patent_app_date] => 2011-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 15 [patent_no_of_words] => 4917 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13212080 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7577392 [patent_doc_number] => 20110291274 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-01 [patent_title] => 'METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/205356 [patent_app_country] => US [patent_app_date] => 2011-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4717 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0291/20110291274.pdf [firstpage_image] =>[orig_patent_app_number] => 13205356 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8028053 [patent_doc_number] => 08143109 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-03-27 [patent_title] => 'Method for fabricating damascene interconnect structure having air gaps between metal lines' [patent_app_type] => utility [patent_app_number] => 12/965928 [patent_app_country] => US [patent_app_date] => 2010-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 2144 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/143/08143109.pdf [firstpage_image] =>[orig_patent_app_number] => 12965928 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8114573 [patent_doc_number] => 08158499 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-17 [patent_title] => 'Wire structure, method for fabricating wire, thin film transistor substrate, and method for fabricating thin film transistor substrate' [patent_app_type] => utility [patent_app_number] => 12/942910 [patent_app_country] => US [patent_app_date] => 2010-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 39 [patent_no_of_words] => 11111 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/158/08158499.pdf [firstpage_image] =>[orig_patent_app_number] => 12942910 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7503350 [patent_doc_number] => 08034712 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-11 [patent_title] => 'Method of fabricating dual damascene structure' [patent_app_type] => utility [patent_app_number] => 12/897073 [patent_app_country] => US [patent_app_date] => 2010-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 29 [patent_no_of_words] => 4397 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/034/08034712.pdf [firstpage_image] =>[orig_patent_app_number] => 12897073 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7773851 [patent_doc_number] => 08119457 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-02-21 [patent_title] => 'Flip chip MLP with folded heat sink' [patent_app_type] => utility [patent_app_number] => 12/882353 [patent_app_country] => US [patent_app_date] => 2010-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 2730 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/119/08119457.pdf [firstpage_image] =>[orig_patent_app_number] => 12882353 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7815156 [patent_doc_number] => 20120061776 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-15 [patent_title] => 'WAFER LEVEL PACKAGING' [patent_app_type] => utility [patent_app_number] => 12/879216 [patent_app_country] => US [patent_app_date] => 2010-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5062 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0061/20120061776.pdf [firstpage_image] =>[orig_patent_app_number] => 12879216 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6130780 [patent_doc_number] => 20110006434 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-13 [patent_title] => 'UNDER LAND ROUTING' [patent_app_type] => utility [patent_app_number] => 12/829745 [patent_app_country] => US [patent_app_date] => 2010-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2618 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20110006434.pdf [firstpage_image] =>[orig_patent_app_number] => 12829745 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6090974 [patent_doc_number] => 20110001247 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-06 [patent_title] => 'SEMICONDUCTOR DEVICE MANUFACTURING METHOD' [patent_app_type] => utility [patent_app_number] => 12/827651 [patent_app_country] => US [patent_app_date] => 2010-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 34 [patent_no_of_words] => 9825 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20110001247.pdf [firstpage_image] =>[orig_patent_app_number] => 12827651 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7706691 [patent_doc_number] => 20120001340 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-05 [patent_title] => 'METHOD AND SYSTEM FOR ALIGNMENT OF INTEGRATED CIRCUITS' [patent_app_type] => utility [patent_app_number] => 12/827440 [patent_app_country] => US [patent_app_date] => 2010-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 4319 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12827440 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7706672 [patent_doc_number] => 20120001327 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-05 [patent_title] => 'Ball Grid Array with Improved Single-Ended and Differential Signal Performance' [patent_app_type] => utility [patent_app_number] => 12/827693 [patent_app_country] => US [patent_app_date] => 2010-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 4729 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12827693 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8528329 [patent_doc_number] => 08304902 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-06 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/826228 [patent_app_country] => US [patent_app_date] => 2010-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4050 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 339 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12826228 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6461268 [patent_doc_number] => 20100190316 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-29 [patent_title] => 'METHOD OF SELECTIVE OXYGEN IMPLANTATION TO DIELECTRICALLLY ISOLATE SEMICONDUCTOR DEVICES USING NO EXTRA MASKS' [patent_app_type] => utility [patent_app_number] => 12/753636 [patent_app_country] => US [patent_app_date] => 2010-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1944 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0190/20100190316.pdf [firstpage_image] =>[orig_patent_app_number] => 12753636 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6427355 [patent_doc_number] => 20100151653 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-17 [patent_title] => 'Methods Of Forming A Plurality Of Capacitors' [patent_app_type] => utility [patent_app_number] => 12/710077 [patent_app_country] => US [patent_app_date] => 2010-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4512 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0151/20100151653.pdf [firstpage_image] =>[orig_patent_app_number] => 12710077 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6471240 [patent_doc_number] => 20100207243 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-19 [patent_title] => 'Semiconductor device and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 12/656746 [patent_app_country] => US [patent_app_date] => 2010-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7405 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0207/20100207243.pdf [firstpage_image] =>[orig_patent_app_number] => 12656746 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8005917 [patent_doc_number] => 08084359 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-12-27 [patent_title] => 'Semiconductor package and methods of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/656680 [patent_app_country] => US [patent_app_date] => 2010-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 4844 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/084/08084359.pdf [firstpage_image] =>[orig_patent_app_number] => 12656680 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6448820 [patent_doc_number] => 20100105201 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-29 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/650093 [patent_app_country] => US [patent_app_date] => 2009-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6371 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0105/20100105201.pdf [firstpage_image] =>[orig_patent_app_number] => 12650093 [rel_patent_id] =>[rel_patent_doc_number] =>)