Search

Michael J. Metzger

Examiner (ID: 19567, Phone: (571)272-3105 , Office: P/2182 )

Most Active Art Unit
2182
Art Unit(s)
2182, 2183
Total Applications
577
Issued Applications
477
Pending Applications
65
Abandoned Applications
48

Applications

Application numberTitle of the applicationFiling DateStatus
18/846638 TIME-DIVISION MULTIPLEXED SIMD FUNCTION UNIT Sep 11, 2024 Pending
Array ( [id] => 20717001 [patent_doc_number] => 12632252 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-19 [patent_title] => Memory device and method with processing-in-memory block [patent_app_type] => utility [patent_app_number] => 18/814641 [patent_app_country] => US [patent_app_date] => 2024-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 9633 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18814641 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/814641
Memory device and method with processing-in-memory block Aug 25, 2024 Issued
Array ( [id] => 20474837 [patent_doc_number] => 20260017058 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-15 [patent_title] => Systems and Methods to Provide Instructions to Coprocessors [patent_app_type] => utility [patent_app_number] => 18/810333 [patent_app_country] => US [patent_app_date] => 2024-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18810333 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/810333
Systems and Methods to Provide Instructions to Coprocessors Aug 19, 2024 Pending
Array ( [id] => 19617374 [patent_doc_number] => 20240403054 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-05 [patent_title] => LOOK-UP TABLE READ [patent_app_type] => utility [patent_app_number] => 18/805711 [patent_app_country] => US [patent_app_date] => 2024-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23733 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18805711 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/805711
LOOK-UP TABLE READ Aug 14, 2024 Pending
Array ( [id] => 19617435 [patent_doc_number] => 20240403115 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-05 [patent_title] => Thread Creation on Local or Remote Compute Elements by a Multi-Threaded, Self-Scheduling Processor [patent_app_type] => utility [patent_app_number] => 18/800423 [patent_app_country] => US [patent_app_date] => 2024-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 25315 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18800423 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/800423
Thread creation on local or remote compute elements by a multi-threaded, self-scheduling processor Aug 11, 2024 Issued
Array ( [id] => 20828159 [patent_doc_number] => 12681726 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-07-14 [patent_title] => Streaming engine with cache-like stream data storage and lifetime tracking [patent_app_type] => utility [patent_app_number] => 18/779980 [patent_app_country] => US [patent_app_date] => 2024-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 45 [patent_no_of_words] => 20576 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18779980 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/779980
Streaming engine with cache-like stream data storage and lifetime tracking Jul 21, 2024 Issued
Array ( [id] => 20249752 [patent_doc_number] => 20250298621 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-25 [patent_title] => PROCESSOR WITH ONE OR MORE PROGRESSIVE CONSERVATIVE EXECUTION MODES [patent_app_type] => utility [patent_app_number] => 18/773632 [patent_app_country] => US [patent_app_date] => 2024-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7528 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18773632 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/773632
Processor with one or more progressive conservative execution modes Jul 15, 2024 Issued
Array ( [id] => 19711100 [patent_doc_number] => 20250021242 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-16 [patent_title] => PROCESSOR WITH HARDWARE-INTEGRATED MEMORY ACCESS PROTECTION [patent_app_type] => utility [patent_app_number] => 18/771764 [patent_app_country] => US [patent_app_date] => 2024-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26313 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18771764 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/771764
PROCESSOR WITH HARDWARE-INTEGRATED MEMORY ACCESS PROTECTION Jul 11, 2024 Pending
Array ( [id] => 19544988 [patent_doc_number] => 20240362024 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => Schedule Instructions of a Program of Data Flows for Execution in Tiles of a Coarse Grained Reconfigurable Array [patent_app_type] => utility [patent_app_number] => 18/770560 [patent_app_country] => US [patent_app_date] => 2024-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14074 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18770560 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/770560
Schedule Instructions of a Program of Data Flows for Execution in Tiles of a Coarse Grained Reconfigurable Array Jul 10, 2024 Pending
Array ( [id] => 20507091 [patent_doc_number] => 12541367 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-03 [patent_title] => Processing for processors performing tasks having forward conditional branch instructions [patent_app_type] => utility [patent_app_number] => 18/769206 [patent_app_country] => US [patent_app_date] => 2024-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 16247 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18769206 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/769206
Processing for processors performing tasks having forward conditional branch instructions Jul 9, 2024 Issued
Array ( [id] => 19499201 [patent_doc_number] => 20240338219 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-10 [patent_title] => CONFIGURING A PREFETCHER ASSOCIATED WITH A PROCESSOR CORE [patent_app_type] => utility [patent_app_number] => 18/747412 [patent_app_country] => US [patent_app_date] => 2024-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10600 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18747412 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/747412
CONFIGURING A PREFETCHER ASSOCIATED WITH A PROCESSOR CORE Jun 17, 2024 Pending
Array ( [id] => 19703883 [patent_doc_number] => 12197919 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-01-14 [patent_title] => Dynamic software interface translation for computing in a heterogeneous environment [patent_app_type] => utility [patent_app_number] => 18/744738 [patent_app_country] => US [patent_app_date] => 2024-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 13700 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18744738 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/744738
Dynamic software interface translation for computing in a heterogeneous environment Jun 16, 2024 Issued
Array ( [id] => 19617373 [patent_doc_number] => 20240403053 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-05 [patent_title] => PROCESSING-IN-MEMORY MEMORY DEVICE AND METHOD FOR PERFORMING INDIRECT ADDRESSING IN THE SAME [patent_app_type] => utility [patent_app_number] => 18/678520 [patent_app_country] => US [patent_app_date] => 2024-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6796 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18678520 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/678520
Processing-in-memory memory device and method for performing indirect addressing in the same May 29, 2024 Issued
Array ( [id] => 20351468 [patent_doc_number] => 20250348320 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-13 [patent_title] => COMPUTING DEVICES WITH INSTRUCTION QUEUES AND PROCESSING-ELEMENT ARRAY CONTROLLERS [patent_app_type] => utility [patent_app_number] => 18/661145 [patent_app_country] => US [patent_app_date] => 2024-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18661145 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/661145
COMPUTING DEVICES WITH INSTRUCTION QUEUES AND PROCESSING-ELEMENT ARRAY CONTROLLERS May 9, 2024 Pending
Array ( [id] => 19362830 [patent_doc_number] => 20240264864 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => NEURAL PROCESSING UNIT [patent_app_type] => utility [patent_app_number] => 18/625236 [patent_app_country] => US [patent_app_date] => 2024-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 55441 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18625236 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/625236
NEURAL PROCESSING UNIT Apr 2, 2024 Pending
Array ( [id] => 19476014 [patent_doc_number] => 12106108 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-10-01 [patent_title] => Systems and methods for creating determinations systems [patent_app_type] => utility [patent_app_number] => 18/623567 [patent_app_country] => US [patent_app_date] => 2024-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 13401 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18623567 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/623567
Systems and methods for creating determinations systems Mar 31, 2024 Issued
Array ( [id] => 20281697 [patent_doc_number] => 20250306939 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-02 [patent_title] => APPARATUSES, SYSTEMS, AND METHODS FOR OUT-OF-ORDER TASK RESOLUTION IN INTEGRATED CIRCUITS [patent_app_type] => utility [patent_app_number] => 18/620948 [patent_app_country] => US [patent_app_date] => 2024-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18620948 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/620948
APPARATUSES, SYSTEMS, AND METHODS FOR OUT-OF-ORDER TASK RESOLUTION IN INTEGRATED CIRCUITS Mar 27, 2024 Pending
Array ( [id] => 20281699 [patent_doc_number] => 20250306941 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-02 [patent_title] => AUTOMATIC HARDWARE SPECULATION SUPPRESSION [patent_app_type] => utility [patent_app_number] => 18/620068 [patent_app_country] => US [patent_app_date] => 2024-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3433 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18620068 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/620068
AUTOMATIC HARDWARE SPECULATION SUPPRESSION Mar 27, 2024 Pending
Array ( [id] => 19362941 [patent_doc_number] => 20240264975 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => Reconfigurable Parallel Processing [patent_app_type] => utility [patent_app_number] => 18/619382 [patent_app_country] => US [patent_app_date] => 2024-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 30679 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -185 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18619382 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/619382
Reconfigurable Parallel Processing Mar 27, 2024 Pending
Array ( [id] => 19466337 [patent_doc_number] => 20240320007 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => DATA PROCESSING DEVICE [patent_app_type] => utility [patent_app_number] => 18/612252 [patent_app_country] => US [patent_app_date] => 2024-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10932 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18612252 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/612252
Data processing device Mar 20, 2024 Issued
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