Search

Michael J. Metzger

Examiner (ID: 19567, Phone: (571)272-3105 , Office: P/2182 )

Most Active Art Unit
2182
Art Unit(s)
2182, 2183
Total Applications
577
Issued Applications
477
Pending Applications
65
Abandoned Applications
48

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18897302 [patent_doc_number] => 20240012787 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-11 [patent_title] => MULTI-LEVEL HIERARCHICAL ROUTING MATRICES FOR PATTERN-RECOGNITION PROCESSORS [patent_app_type] => utility [patent_app_number] => 18/371635 [patent_app_country] => US [patent_app_date] => 2023-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9786 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18371635 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/371635
Multi-level hierarchical routing matrices for pattern-recognition processors Sep 21, 2023 Issued
Array ( [id] => 18998155 [patent_doc_number] => 11915003 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-27 [patent_title] => Process parasitism-based branch prediction method and device for serverless computing, electronic device, and non-transitory readable storage medium [patent_app_type] => utility [patent_app_number] => 18/459397 [patent_app_country] => US [patent_app_date] => 2023-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 4529 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18459397 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/459397
Process parasitism-based branch prediction method and device for serverless computing, electronic device, and non-transitory readable storage medium Aug 30, 2023 Issued
Array ( [id] => 20460943 [patent_doc_number] => 20260010371 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-08 [patent_title] => PROCESSOR THAT IMPLEMENTS INDIRECT ADDRESSING-STYLE CONDITIONAL JUMP INSTRUCTIONS, PROGRAM RECORDING MEDIUM, AND METHOD [patent_app_type] => utility [patent_app_number] => 19/111422 [patent_app_country] => US [patent_app_date] => 2023-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19111422 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/111422
PROCESSOR THAT IMPLEMENTS INDIRECT ADDRESSING-STYLE CONDITIONAL JUMP INSTRUCTIONS, PROGRAM RECORDING MEDIUM, AND METHOD Aug 24, 2023 Pending
Array ( [id] => 20564001 [patent_doc_number] => 12566610 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-03 [patent_title] => Microprocessor with apparatus and method for replaying load instructions [patent_app_type] => utility [patent_app_number] => 18/237511 [patent_app_country] => US [patent_app_date] => 2023-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5065 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18237511 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/237511
Microprocessor with apparatus and method for replaying load instructions Aug 23, 2023 Issued
Array ( [id] => 19669809 [patent_doc_number] => 12182568 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-31 [patent_title] => Systems and methods for computing dot products of nibbles in two tile operands [patent_app_type] => utility [patent_app_number] => 18/449651 [patent_app_country] => US [patent_app_date] => 2023-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 46 [patent_no_of_words] => 26156 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 271 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18449651 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/449651
Systems and methods for computing dot products of nibbles in two tile operands Aug 13, 2023 Issued
Array ( [id] => 19771995 [patent_doc_number] => 20250053421 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-13 [patent_title] => REGISTER CLEARING [patent_app_type] => utility [patent_app_number] => 18/448240 [patent_app_country] => US [patent_app_date] => 2023-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20144 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18448240 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/448240
Register clearing Aug 10, 2023 Issued
Array ( [id] => 18912172 [patent_doc_number] => 11875151 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-01-16 [patent_title] => Inter-process serving of machine learning features from mapped memory for machine learning models [patent_app_type] => utility [patent_app_number] => 18/359818 [patent_app_country] => US [patent_app_date] => 2023-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4901 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18359818 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/359818
Inter-process serving of machine learning features from mapped memory for machine learning models Jul 25, 2023 Issued
Array ( [id] => 19747851 [patent_doc_number] => 20250036416 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-30 [patent_title] => Biased Indirect Control Transfer Prediction [patent_app_type] => utility [patent_app_number] => 18/358894 [patent_app_country] => US [patent_app_date] => 2023-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 41292 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18358894 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/358894
Biased indirect control transfer prediction Jul 24, 2023 Issued
Array ( [id] => 19905443 [patent_doc_number] => 12282448 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-22 [patent_title] => Routing method based on a sorted operation unit graph for an iterative placement and routing on a reconfigurable processor [patent_app_type] => utility [patent_app_number] => 18/226010 [patent_app_country] => US [patent_app_date] => 2023-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 18822 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18226010 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/226010
Routing method based on a sorted operation unit graph for an iterative placement and routing on a reconfigurable processor Jul 24, 2023 Issued
Array ( [id] => 19633150 [patent_doc_number] => 20240411599 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-12 [patent_title] => CPU TIGHT-COUPLED ACCELERATOR [patent_app_type] => utility [patent_app_number] => 18/225041 [patent_app_country] => US [patent_app_date] => 2023-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9681 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18225041 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/225041
CPU tight-coupled accelerator Jul 20, 2023 Issued
Array ( [id] => 19725824 [patent_doc_number] => 20250028575 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-23 [patent_title] => DATA PROCESSING SYSTEM [patent_app_type] => utility [patent_app_number] => 18/355282 [patent_app_country] => US [patent_app_date] => 2023-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10582 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18355282 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/355282
DATA PROCESSING SYSTEM Jul 18, 2023 Pending
Array ( [id] => 19711196 [patent_doc_number] => 20250021338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-16 [patent_title] => Next Fetch Predictor for Trace Cache [patent_app_type] => utility [patent_app_number] => 18/352326 [patent_app_country] => US [patent_app_date] => 2023-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19954 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18352326 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/352326
Next fetch predictor for trace cache Jul 13, 2023 Issued
Array ( [id] => 19872960 [patent_doc_number] => 12265823 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-01 [patent_title] => Trace cache with filter for internal control transfer inclusion [patent_app_type] => utility [patent_app_number] => 18/352323 [patent_app_country] => US [patent_app_date] => 2023-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 22 [patent_no_of_words] => 19857 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18352323 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/352323
Trace cache with filter for internal control transfer inclusion Jul 13, 2023 Issued
Array ( [id] => 19872966 [patent_doc_number] => 12265829 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-01 [patent_title] => Re-triggering wake-up to handle time skew between scalar and vector sides [patent_app_type] => utility [patent_app_number] => 18/338643 [patent_app_country] => US [patent_app_date] => 2023-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10514 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18338643 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/338643
Re-triggering wake-up to handle time skew between scalar and vector sides Jun 20, 2023 Issued
Array ( [id] => 18711270 [patent_doc_number] => 20230333899 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-19 [patent_title] => ACCELERATOR, METHOD OF OPERATING THE SAME, AND ELECTRONIC DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/337723 [patent_app_country] => US [patent_app_date] => 2023-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7255 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18337723 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/337723
Accelerator, method of operating the same, and electronic device including the same Jun 19, 2023 Issued
Array ( [id] => 19963800 [patent_doc_number] => 12333309 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-17 [patent_title] => Differential pipeline delays in a coprocessor [patent_app_type] => utility [patent_app_number] => 18/211007 [patent_app_country] => US [patent_app_date] => 2023-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1211 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18211007 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/211007
Differential pipeline delays in a coprocessor Jun 15, 2023 Issued
Array ( [id] => 20494150 [patent_doc_number] => 12536019 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-27 [patent_title] => FPGA wide barrel-shifters implementation using packed DSP multipliers [patent_app_type] => utility [patent_app_number] => 18/335127 [patent_app_country] => US [patent_app_date] => 2023-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 4363 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18335127 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/335127
FPGA wide barrel-shifters implementation using packed DSP multipliers Jun 13, 2023 Issued
Array ( [id] => 20408779 [patent_doc_number] => 20250377888 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-11 [patent_title] => VECTOR EXTRACT AND MERGE INSTRUCTION [patent_app_type] => utility [patent_app_number] => 18/877106 [patent_app_country] => US [patent_app_date] => 2023-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14059 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18877106 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/877106
VECTOR EXTRACT AND MERGE INSTRUCTION Jun 13, 2023 Pending
Array ( [id] => 19633269 [patent_doc_number] => 20240411718 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-12 [patent_title] => HARDWARE-BASED IMAGE/VIDEO PROCESSING IN MACHINE LEARNING-ACCELERATOR SYSTEM-ON-CHIP [patent_app_type] => utility [patent_app_number] => 18/333377 [patent_app_country] => US [patent_app_date] => 2023-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8908 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18333377 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/333377
Hardware-based image/video processing in machine learning-accelerator system-on-chip Jun 11, 2023 Issued
Array ( [id] => 19022141 [patent_doc_number] => 20240078312 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-07 [patent_title] => Simultaneous Multi-Processor (SiMulPro) Apparatus, Simultaneous Transmit And Receive (STAR) Apparatus, DRAM Interface Apparatus, and Associated Methods [patent_app_type] => utility [patent_app_number] => 18/206188 [patent_app_country] => US [patent_app_date] => 2023-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13060 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18206188 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/206188
Simultaneous Multi-Processor (SiMulPro) Apparatus, Simultaneous Transmit And Receive (STAR) Apparatus, DRAM Interface Apparatus, and Associated Methods Jun 5, 2023 Abandoned
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