Search

Michael J. Metzger

Examiner (ID: 2175, Phone: (571)272-3105 , Office: P/2182 )

Most Active Art Unit
2182
Art Unit(s)
2183, 2182
Total Applications
562
Issued Applications
469
Pending Applications
58
Abandoned Applications
48

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19711196 [patent_doc_number] => 20250021338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-16 [patent_title] => Next Fetch Predictor for Trace Cache [patent_app_type] => utility [patent_app_number] => 18/352326 [patent_app_country] => US [patent_app_date] => 2023-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19954 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18352326 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/352326
Next fetch predictor for trace cache Jul 13, 2023 Issued
Array ( [id] => 19872960 [patent_doc_number] => 12265823 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-01 [patent_title] => Trace cache with filter for internal control transfer inclusion [patent_app_type] => utility [patent_app_number] => 18/352323 [patent_app_country] => US [patent_app_date] => 2023-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 22 [patent_no_of_words] => 19857 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18352323 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/352323
Trace cache with filter for internal control transfer inclusion Jul 13, 2023 Issued
Array ( [id] => 19872966 [patent_doc_number] => 12265829 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-01 [patent_title] => Re-triggering wake-up to handle time skew between scalar and vector sides [patent_app_type] => utility [patent_app_number] => 18/338643 [patent_app_country] => US [patent_app_date] => 2023-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10514 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18338643 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/338643
Re-triggering wake-up to handle time skew between scalar and vector sides Jun 20, 2023 Issued
Array ( [id] => 18711270 [patent_doc_number] => 20230333899 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-19 [patent_title] => ACCELERATOR, METHOD OF OPERATING THE SAME, AND ELECTRONIC DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/337723 [patent_app_country] => US [patent_app_date] => 2023-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7255 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18337723 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/337723
ACCELERATOR, METHOD OF OPERATING THE SAME, AND ELECTRONIC DEVICE INCLUDING THE SAME Jun 19, 2023 Pending
Array ( [id] => 19963800 [patent_doc_number] => 12333309 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-17 [patent_title] => Differential pipeline delays in a coprocessor [patent_app_type] => utility [patent_app_number] => 18/211007 [patent_app_country] => US [patent_app_date] => 2023-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1211 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18211007 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/211007
Differential pipeline delays in a coprocessor Jun 15, 2023 Issued
Array ( [id] => 20494150 [patent_doc_number] => 12536019 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-27 [patent_title] => FPGA wide barrel-shifters implementation using packed DSP multipliers [patent_app_type] => utility [patent_app_number] => 18/335127 [patent_app_country] => US [patent_app_date] => 2023-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 4363 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18335127 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/335127
FPGA wide barrel-shifters implementation using packed DSP multipliers Jun 13, 2023 Issued
Array ( [id] => 19633269 [patent_doc_number] => 20240411718 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-12 [patent_title] => HARDWARE-BASED IMAGE/VIDEO PROCESSING IN MACHINE LEARNING-ACCELERATOR SYSTEM-ON-CHIP [patent_app_type] => utility [patent_app_number] => 18/333377 [patent_app_country] => US [patent_app_date] => 2023-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8908 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18333377 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/333377
Hardware-based image/video processing in machine learning-accelerator system-on-chip Jun 11, 2023 Issued
Array ( [id] => 19022141 [patent_doc_number] => 20240078312 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-07 [patent_title] => Simultaneous Multi-Processor (SiMulPro) Apparatus, Simultaneous Transmit And Receive (STAR) Apparatus, DRAM Interface Apparatus, and Associated Methods [patent_app_type] => utility [patent_app_number] => 18/206188 [patent_app_country] => US [patent_app_date] => 2023-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13060 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18206188 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/206188
Simultaneous Multi-Processor (SiMulPro) Apparatus, Simultaneous Transmit And Receive (STAR) Apparatus, DRAM Interface Apparatus, and Associated Methods Jun 5, 2023 Abandoned
Array ( [id] => 19942625 [patent_doc_number] => 12314757 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-05-27 [patent_title] => Efficient resource scheduling using adaptive scheduling criteria [patent_app_type] => utility [patent_app_number] => 18/205702 [patent_app_country] => US [patent_app_date] => 2023-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5792 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 306 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18205702 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/205702
Efficient resource scheduling using adaptive scheduling criteria Jun 4, 2023 Issued
Array ( [id] => 19617372 [patent_doc_number] => 20240403052 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-05 [patent_title] => INDEXED VECTOR PERMUTATION OPERATIONS [patent_app_type] => utility [patent_app_number] => 18/329456 [patent_app_country] => US [patent_app_date] => 2023-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8841 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18329456 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/329456
INDEXED VECTOR PERMUTATION OPERATIONS Jun 4, 2023 Pending
Array ( [id] => 20446908 [patent_doc_number] => 20260003630 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-01 [patent_title] => PROCESSOR FOR CONTROLLING PIPELINE PROCESSING BASED ON JUMP INSTRUCTION, AND PROGRAM STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 18/876798 [patent_app_country] => US [patent_app_date] => 2023-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1318 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18876798 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/876798
PROCESSOR FOR CONTROLLING PIPELINE PROCESSING BASED ON JUMP INSTRUCTION, AND PROGRAM STORAGE MEDIUM May 29, 2023 Pending
Array ( [id] => 19190002 [patent_doc_number] => 20240168915 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-23 [patent_title] => Graph Spatial Split [patent_app_type] => utility [patent_app_number] => 18/202059 [patent_app_country] => US [patent_app_date] => 2023-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17422 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18202059 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/202059
Graph spatial split May 24, 2023 Issued
Array ( [id] => 18539812 [patent_doc_number] => 20230244920 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-03 [patent_title] => NEURAL PROCESSING DEVICE AND METHOD FOR SYNCHRONIZATION THEREOF [patent_app_type] => utility [patent_app_number] => 18/298935 [patent_app_country] => US [patent_app_date] => 2023-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17989 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18298935 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/298935
Neural processing device and method for synchronization thereof Apr 10, 2023 Issued
Array ( [id] => 20415646 [patent_doc_number] => 12498931 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-16 [patent_title] => Preserving memory ordering between offloaded instructions and non-offloaded instructions [patent_app_type] => utility [patent_app_number] => 18/298723 [patent_app_country] => US [patent_app_date] => 2023-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8426 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18298723 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/298723
Preserving memory ordering between offloaded instructions and non-offloaded instructions Apr 10, 2023 Issued
Array ( [id] => 20221567 [patent_doc_number] => 20250284498 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-11 [patent_title] => INTERRUPT CONTROLLER, APPARATUS, INTERRUPT CONTROL METHOD AND COMPUTER-READABLE MEDIUM [patent_app_type] => utility [patent_app_number] => 18/861990 [patent_app_country] => US [patent_app_date] => 2023-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12547 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18861990 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/861990
INTERRUPT CONTROLLER, APPARATUS, INTERRUPT CONTROL METHOD AND COMPUTER-READABLE MEDIUM Mar 27, 2023 Pending
Array ( [id] => 18531762 [patent_doc_number] => 20230236834 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-27 [patent_title] => SYSTEMS AND METHODS FOR PERFORMING 16-BIT FLOATING-POINT MATRIX DOT PRODUCT INSTRUCTIONS [patent_app_type] => utility [patent_app_number] => 18/190761 [patent_app_country] => US [patent_app_date] => 2023-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 25267 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 306 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18190761 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/190761
Systems and methods for performing 16-bit floating-point matrix dot product instructions Mar 26, 2023 Issued
Array ( [id] => 19466869 [patent_doc_number] => 20240320539 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => GAP COUNTERS FOR SYNCHRONIZATION OF COMPUTE ELEMENTS EXECUTING STATICALLY SCHEDULED INSTRUCTIONS FOR A MACHINE LEARNING ACCELERATOR [patent_app_type] => utility [patent_app_number] => 18/123898 [patent_app_country] => US [patent_app_date] => 2023-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7938 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18123898 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/123898
GAP COUNTERS FOR SYNCHRONIZATION OF COMPUTE ELEMENTS EXECUTING STATICALLY SCHEDULED INSTRUCTIONS FOR A MACHINE LEARNING ACCELERATOR Mar 19, 2023 Pending
Array ( [id] => 20034924 [patent_doc_number] => 20250173146 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-29 [patent_title] => TECHNIQUE FOR HANDLING DATA ELEMENTS STORED IN AN ARRAY STORAGE [patent_app_type] => utility [patent_app_number] => 18/855967 [patent_app_country] => US [patent_app_date] => 2023-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8558 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18855967 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/855967
TECHNIQUE FOR HANDLING DATA ELEMENTS STORED IN AN ARRAY STORAGE Mar 12, 2023 Pending
Array ( [id] => 19523212 [patent_doc_number] => 12124943 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-22 [patent_title] => Broadcasting mode of planar engine for neural processor [patent_app_type] => utility [patent_app_number] => 18/120218 [patent_app_country] => US [patent_app_date] => 2023-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 15092 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18120218 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/120218
Broadcasting mode of planar engine for neural processor Mar 9, 2023 Issued
Array ( [id] => 20481722 [patent_doc_number] => 12530197 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-20 [patent_title] => Vector instruction processing after primary decode [patent_app_type] => utility [patent_app_number] => 18/180327 [patent_app_country] => US [patent_app_date] => 2023-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4443 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18180327 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/180327
Vector instruction processing after primary decode Mar 7, 2023 Issued
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