Search

Michael James Carey

Examiner (ID: 835)

Most Active Art Unit
3766
Art Unit(s)
3762, 4187, 3766, 3795, 3792
Total Applications
666
Issued Applications
554
Pending Applications
26
Abandoned Applications
95

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9876342 [patent_doc_number] => 08963615 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-02-24 [patent_title] => 'Automatic bipolar signal switching' [patent_app_type] => utility [patent_app_number] => 13/756099 [patent_app_country] => US [patent_app_date] => 2013-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5001 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13756099 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/756099
Automatic bipolar signal switching Jan 30, 2013 Issued
Array ( [id] => 9692832 [patent_doc_number] => 08823437 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-02 [patent_title] => 'Clock signal generator' [patent_app_type] => utility [patent_app_number] => 13/754524 [patent_app_country] => US [patent_app_date] => 2013-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 5780 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13754524 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/754524
Clock signal generator Jan 29, 2013 Issued
Array ( [id] => 9632430 [patent_doc_number] => 20140210538 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-31 [patent_title] => 'MULTIPLE RAMP VARIABLE ATTENUATOR' [patent_app_type] => utility [patent_app_number] => 13/750729 [patent_app_country] => US [patent_app_date] => 2013-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 8910 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13750729 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/750729
Multiple ramp variable attenuator Jan 24, 2013 Issued
Array ( [id] => 9621574 [patent_doc_number] => 08791751 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-29 [patent_title] => 'Semiconductor integrated circuit and method of reducing power consumption' [patent_app_type] => utility [patent_app_number] => 13/749577 [patent_app_country] => US [patent_app_date] => 2013-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 7913 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13749577 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/749577
Semiconductor integrated circuit and method of reducing power consumption Jan 23, 2013 Issued
Array ( [id] => 9483999 [patent_doc_number] => 08729953 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-20 [patent_title] => 'Method and system for reduction of off-current in field effect transistors' [patent_app_type] => utility [patent_app_number] => 13/748270 [patent_app_country] => US [patent_app_date] => 2013-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 4486 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13748270 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/748270
Method and system for reduction of off-current in field effect transistors Jan 22, 2013 Issued
Array ( [id] => 9791189 [patent_doc_number] => 20150003133 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-01 [patent_title] => 'Drive Circuit of Semiconductor Switching Element and Power Conversion Circuit Using the Same' [patent_app_type] => utility [patent_app_number] => 14/375189 [patent_app_country] => US [patent_app_date] => 2013-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5295 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14375189 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/375189
Drive Circuit of Semiconductor Switching Element and Power Conversion Circuit Using the Same Jan 21, 2013 Abandoned
Array ( [id] => 9609157 [patent_doc_number] => 08786332 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-07-22 [patent_title] => 'Reset extender for divided clock domains' [patent_app_type] => utility [patent_app_number] => 13/744004 [patent_app_country] => US [patent_app_date] => 2013-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 9087 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13744004 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/744004
Reset extender for divided clock domains Jan 16, 2013 Issued
Array ( [id] => 9566588 [patent_doc_number] => 20140184301 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-03 [patent_title] => 'LINEARITY IMPROVEMENT OVER TEMPERATURE USING TEMPERATURE DEPENDENT COMMON-MODE VOLTAGES IN ACTIVE MIXER' [patent_app_type] => utility [patent_app_number] => 13/732104 [patent_app_country] => US [patent_app_date] => 2012-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6251 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13732104 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/732104
Linearity improvement over temperature using temperature dependent common-mode voltages in active mixer Dec 30, 2012 Issued
Array ( [id] => 9335765 [patent_doc_number] => 20140062547 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-06 [patent_title] => 'CORE VOLTAGE RESET SYSTEMS AND METHODS WITH WIDE NOISE MARGIN' [patent_app_type] => utility [patent_app_number] => 13/730668 [patent_app_country] => US [patent_app_date] => 2012-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3570 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13730668 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/730668
Core voltage reset systems and methods with wide noise margin Dec 27, 2012 Issued
Array ( [id] => 8814971 [patent_doc_number] => 20130116016 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-09 [patent_title] => 'Communications Chip with Multi-Port Distributed Antenna' [patent_app_type] => utility [patent_app_number] => 13/729789 [patent_app_country] => US [patent_app_date] => 2012-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5598 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13729789 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/729789
Wireless communications chip with multi-port distributed antenna Dec 27, 2012 Issued
Array ( [id] => 8914305 [patent_doc_number] => 20130175930 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-11 [patent_title] => 'Illuminated Pet Bed Device' [patent_app_type] => utility [patent_app_number] => 13/721150 [patent_app_country] => US [patent_app_date] => 2012-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3341 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13721150 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/721150
Illuminated Pet Bed Device Dec 19, 2012 Abandoned
Array ( [id] => 9504482 [patent_doc_number] => 08742801 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-03 [patent_title] => 'Buffer circuit for semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/717931 [patent_app_country] => US [patent_app_date] => 2012-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 7772 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13717931 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/717931
Buffer circuit for semiconductor device Dec 17, 2012 Issued
Array ( [id] => 9403552 [patent_doc_number] => 08693615 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-08 [patent_title] => 'RAM-based event counters using transposition' [patent_app_type] => utility [patent_app_number] => 13/716711 [patent_app_country] => US [patent_app_date] => 2012-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 7044 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13716711 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/716711
RAM-based event counters using transposition Dec 16, 2012 Issued
Array ( [id] => 9677809 [patent_doc_number] => 08816724 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-26 [patent_title] => 'Nested digital delta-sigma modulator' [patent_app_type] => utility [patent_app_number] => 13/715529 [patent_app_country] => US [patent_app_date] => 2012-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4272 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13715529 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/715529
Nested digital delta-sigma modulator Dec 13, 2012 Issued
Array ( [id] => 9113912 [patent_doc_number] => 08570093 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-29 [patent_title] => 'Adaptive cascode circuit using MOS transistors' [patent_app_type] => utility [patent_app_number] => 13/711447 [patent_app_country] => US [patent_app_date] => 2012-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7103 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 318 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13711447 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/711447
Adaptive cascode circuit using MOS transistors Dec 10, 2012 Issued
Array ( [id] => 11301305 [patent_doc_number] => 09509322 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-29 [patent_title] => 'Low spurious synthesizer circuit and method' [patent_app_type] => utility [patent_app_number] => 14/647949 [patent_app_country] => US [patent_app_date] => 2012-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 29 [patent_no_of_words] => 7967 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14647949 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/647949
Low spurious synthesizer circuit and method Nov 28, 2012 Issued
Array ( [id] => 9509195 [patent_doc_number] => 20140145686 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-29 [patent_title] => 'CHARGE CONSERVATION IN PIXELS' [patent_app_type] => utility [patent_app_number] => 13/686993 [patent_app_country] => US [patent_app_date] => 2012-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5529 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13686993 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/686993
Charge conservation in pixels Nov 27, 2012 Issued
Array ( [id] => 9488869 [patent_doc_number] => 20140139275 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-22 [patent_title] => 'VARIATION-TOLERANT PERIODIC SYNCHRONIZER' [patent_app_type] => utility [patent_app_number] => 13/681929 [patent_app_country] => US [patent_app_date] => 2012-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 10615 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13681929 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/681929
Variation-tolerant periodic synchronizer Nov 19, 2012 Issued
Array ( [id] => 8956814 [patent_doc_number] => 08502596 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-08-06 [patent_title] => 'Filter circuitry' [patent_app_type] => utility [patent_app_number] => 13/675021 [patent_app_country] => US [patent_app_date] => 2012-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 22 [patent_no_of_words] => 12284 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13675021 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/675021
Filter circuitry Nov 12, 2012 Issued
Array ( [id] => 9704902 [patent_doc_number] => 08829975 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-09 [patent_title] => 'Methods and circuits for operating a parallel DMOS switch' [patent_app_type] => utility [patent_app_number] => 13/674250 [patent_app_country] => US [patent_app_date] => 2012-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3748 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13674250 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/674250
Methods and circuits for operating a parallel DMOS switch Nov 11, 2012 Issued
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