Search

Michael James Carey

Examiner (ID: 835)

Most Active Art Unit
3766
Art Unit(s)
3762, 4187, 3766, 3795, 3792
Total Applications
666
Issued Applications
554
Pending Applications
26
Abandoned Applications
95

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11771007 [patent_doc_number] => 09379723 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-06-28 [patent_title] => 'Method and apparatus for generating a digital signal of tunable frequency and frequency synthesizer employing same' [patent_app_type] => utility [patent_app_number] => 14/399104 [patent_app_country] => US [patent_app_date] => 2012-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 15288 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14399104 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/399104
Method and apparatus for generating a digital signal of tunable frequency and frequency synthesizer employing same May 10, 2012 Issued
Array ( [id] => 9300392 [patent_doc_number] => 08648624 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-11 [patent_title] => 'Voltage-to-current converter circuit' [patent_app_type] => utility [patent_app_number] => 13/470004 [patent_app_country] => US [patent_app_date] => 2012-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 5033 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13470004 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/470004
Voltage-to-current converter circuit May 10, 2012 Issued
Array ( [id] => 10112708 [patent_doc_number] => 09148130 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-09-29 [patent_title] => 'System and method for boosting a selective portion of a drive signal for chip-to-chip transmission' [patent_app_type] => utility [patent_app_number] => 13/468415 [patent_app_country] => US [patent_app_date] => 2012-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 53 [patent_figures_cnt] => 53 [patent_no_of_words] => 12818 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13468415 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/468415
System and method for boosting a selective portion of a drive signal for chip-to-chip transmission May 9, 2012 Issued
Array ( [id] => 9609183 [patent_doc_number] => 08786357 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-07-22 [patent_title] => 'Intelligent voltage regulator' [patent_app_type] => utility [patent_app_number] => 13/466004 [patent_app_country] => US [patent_app_date] => 2012-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 11705 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13466004 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/466004
Intelligent voltage regulator May 6, 2012 Issued
Array ( [id] => 9060708 [patent_doc_number] => 08547147 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-01 [patent_title] => 'Power-on-reset circuit and reset method' [patent_app_type] => utility [patent_app_number] => 13/459117 [patent_app_country] => US [patent_app_date] => 2012-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 6307 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13459117 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/459117
Power-on-reset circuit and reset method Apr 27, 2012 Issued
Array ( [id] => 10577648 [patent_doc_number] => 09300304 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-29 [patent_title] => 'Self-biased delay locked loop with delay linearization' [patent_app_type] => utility [patent_app_number] => 14/387618 [patent_app_country] => US [patent_app_date] => 2012-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5531 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14387618 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/387618
Self-biased delay locked loop with delay linearization Apr 25, 2012 Issued
Array ( [id] => 8463013 [patent_doc_number] => 20120268181 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-25 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/451131 [patent_app_country] => US [patent_app_date] => 2012-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5935 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13451131 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/451131
Semiconductor device including a delay locked loop circuit Apr 18, 2012 Issued
Array ( [id] => 8583501 [patent_doc_number] => 20130002322 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-03 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/448547 [patent_app_country] => US [patent_app_date] => 2012-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5637 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13448547 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/448547
Delay locked loop Apr 16, 2012 Issued
Array ( [id] => 8313390 [patent_doc_number] => 20120190411 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-26 [patent_title] => 'Wireless Communications Chip with Multi-Port Distributed Antenna' [patent_app_type] => utility [patent_app_number] => 13/440222 [patent_app_country] => US [patent_app_date] => 2012-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5454 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13440222 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/440222
Wireless communications chip with multi-port distributed antenna Apr 4, 2012 Issued
Array ( [id] => 9060707 [patent_doc_number] => 08547146 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-10-01 [patent_title] => 'Overcurrent based power control and circuit reset' [patent_app_type] => utility [patent_app_number] => 13/439538 [patent_app_country] => US [patent_app_date] => 2012-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3671 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13439538 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/439538
Overcurrent based power control and circuit reset Apr 3, 2012 Issued
Array ( [id] => 8451116 [patent_doc_number] => 20120262062 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-18 [patent_title] => 'METHOD OF IMPROVING VISIBILITY THROUGH A WINDOW' [patent_app_type] => utility [patent_app_number] => 13/433568 [patent_app_country] => US [patent_app_date] => 2012-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2359 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13433568 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/433568
Method of improving visibility through a window Mar 28, 2012 Issued
Array ( [id] => 9778893 [patent_doc_number] => 08854103 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-07 [patent_title] => 'Clamping circuit' [patent_app_type] => utility [patent_app_number] => 13/432411 [patent_app_country] => US [patent_app_date] => 2012-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 14 [patent_no_of_words] => 4665 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13432411 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/432411
Clamping circuit Mar 27, 2012 Issued
Array ( [id] => 9172162 [patent_doc_number] => 20130314147 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-28 [patent_title] => 'SEMICONDUCTOR PROCESSING DEVICE AND SEMICONDUCTOR PROCESSING SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/984875 [patent_app_country] => US [patent_app_date] => 2012-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 18279 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13984875 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/984875
SEMICONDUCTOR PROCESSING DEVICE AND SEMICONDUCTOR PROCESSING SYSTEM Mar 27, 2012 Abandoned
Array ( [id] => 10023874 [patent_doc_number] => 09066381 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-23 [patent_title] => 'System and method for low level dimming' [patent_app_type] => utility [patent_app_number] => 13/422808 [patent_app_country] => US [patent_app_date] => 2012-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 18 [patent_no_of_words] => 61979 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13422808 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/422808
System and method for low level dimming Mar 15, 2012 Issued
Array ( [id] => 8933393 [patent_doc_number] => 08493098 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-07-23 [patent_title] => 'Systems and methods for compensating the input offset voltage of a comparator' [patent_app_type] => utility [patent_app_number] => 13/420274 [patent_app_country] => US [patent_app_date] => 2012-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 20 [patent_no_of_words] => 7530 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13420274 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/420274
Systems and methods for compensating the input offset voltage of a comparator Mar 13, 2012 Issued
Array ( [id] => 10014480 [patent_doc_number] => 09057491 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-16 [patent_title] => 'Network controlled interior lighting system' [patent_app_type] => utility [patent_app_number] => 13/419822 [patent_app_country] => US [patent_app_date] => 2012-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 4309 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 295 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13419822 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/419822
Network controlled interior lighting system Mar 13, 2012 Issued
Array ( [id] => 8391275 [patent_doc_number] => 20120229120 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-13 [patent_title] => 'OVER-VOLTAGE TOLERANT LEVEL DETECTION CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/414120 [patent_app_country] => US [patent_app_date] => 2012-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2148 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13414120 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/414120
Over-voltage tolerant level detection circuit Mar 6, 2012 Issued
Array ( [id] => 9031987 [patent_doc_number] => 20130234625 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-12 [patent_title] => 'LIGHTING CONTROL SYSTEM USING MOTION AND SOUND' [patent_app_type] => utility [patent_app_number] => 13/412880 [patent_app_country] => US [patent_app_date] => 2012-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4715 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13412880 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/412880
LIGHTING CONTROL SYSTEM USING MOTION AND SOUND Mar 5, 2012 Abandoned
Array ( [id] => 9000733 [patent_doc_number] => 20130221858 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-29 [patent_title] => 'AUTOMATED DISCOVERY OF A TOPOLOGY FOR LUMINAIRES' [patent_app_type] => utility [patent_app_number] => 13/409005 [patent_app_country] => US [patent_app_date] => 2012-02-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7890 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13409005 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/409005
AUTOMATED DISCOVERY OF A TOPOLOGY FOR LUMINAIRES Feb 28, 2012 Abandoned
Array ( [id] => 8863833 [patent_doc_number] => 20130147536 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-13 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/406936 [patent_app_country] => US [patent_app_date] => 2012-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9715 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13406936 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/406936
Semiconductor device Feb 27, 2012 Issued
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