Search

Michael James Carey

Examiner (ID: 835)

Most Active Art Unit
3766
Art Unit(s)
3762, 4187, 3766, 3795, 3792
Total Applications
666
Issued Applications
554
Pending Applications
26
Abandoned Applications
95

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6052992 [patent_doc_number] => 20110109352 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-12 [patent_title] => 'Summation Circuit in DC-DC Converter' [patent_app_type] => utility [patent_app_number] => 12/938150 [patent_app_country] => US [patent_app_date] => 2010-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2281 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20110109352.pdf [firstpage_image] =>[orig_patent_app_number] => 12938150 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/938150
Summation circuit in DC-DC converter Nov 1, 2010 Issued
Array ( [id] => 5941406 [patent_doc_number] => 20110102026 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-05 [patent_title] => 'ANTENNA DRIVING DEVICE' [patent_app_type] => utility [patent_app_number] => 12/913893 [patent_app_country] => US [patent_app_date] => 2010-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 6744 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0102/20110102026.pdf [firstpage_image] =>[orig_patent_app_number] => 12913893 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/913893
Antenna driving device Oct 27, 2010 Issued
Array ( [id] => 6121723 [patent_doc_number] => 20110084759 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-14 [patent_title] => 'HIGH IMPEDANCE BIAS NETWORK' [patent_app_type] => utility [patent_app_number] => 12/899296 [patent_app_country] => US [patent_app_date] => 2010-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3054 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0084/20110084759.pdf [firstpage_image] =>[orig_patent_app_number] => 12899296 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/899296
High impedance bias network Oct 5, 2010 Issued
Array ( [id] => 8287718 [patent_doc_number] => 20120176041 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-12 [patent_title] => 'METHOD OF CONTROLLING LIGHT DISTRIBUTION IN A SPACE INCLUDING MULTIPLE INSTALLED LIGHT SOURCES AND AN EXTERNAL LIGHT SOURCE' [patent_app_type] => utility [patent_app_number] => 13/395505 [patent_app_country] => US [patent_app_date] => 2010-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4842 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13395505 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/395505
METHOD OF CONTROLLING LIGHT DISTRIBUTION IN A SPACE INCLUDING MULTIPLE INSTALLED LIGHT SOURCES AND AN EXTERNAL LIGHT SOURCE Sep 13, 2010 Abandoned
Array ( [id] => 8329397 [patent_doc_number] => 08237485 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-07 [patent_title] => 'System and method for multiple-phase clock generation' [patent_app_type] => utility [patent_app_number] => 12/872371 [patent_app_country] => US [patent_app_date] => 2010-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 3527 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12872371 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/872371
System and method for multiple-phase clock generation Aug 30, 2010 Issued
Array ( [id] => 8249517 [patent_doc_number] => 20120153838 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-21 [patent_title] => 'COGNITIVE IDENTIFIER ASSIGNMENT FOR LIGHT SOURCE CONTROL' [patent_app_type] => utility [patent_app_number] => 13/392533 [patent_app_country] => US [patent_app_date] => 2010-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5557 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20120153838.pdf [firstpage_image] =>[orig_patent_app_number] => 13392533 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/392533
COGNITIVE IDENTIFIER ASSIGNMENT FOR LIGHT SOURCE CONTROL Aug 24, 2010 Abandoned
Array ( [id] => 10036977 [patent_doc_number] => 09078314 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-07 [patent_title] => 'Light-emitting diode driving circuit capable of controlling current of light-emitting diode on a full time basis' [patent_app_type] => utility [patent_app_number] => 13/390931 [patent_app_country] => US [patent_app_date] => 2010-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 25 [patent_no_of_words] => 6426 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13390931 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/390931
Light-emitting diode driving circuit capable of controlling current of light-emitting diode on a full time basis Aug 16, 2010 Issued
Array ( [id] => 6043297 [patent_doc_number] => 20110204947 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-25 [patent_title] => 'METHOD AND APPARATUS FOR ADAPTIVELY MODIFYING A PULSE WIDTH OF A PULSE WIDTH MODULATED OUTPUT' [patent_app_type] => utility [patent_app_number] => 12/858181 [patent_app_country] => US [patent_app_date] => 2010-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 5063 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0204/20110204947.pdf [firstpage_image] =>[orig_patent_app_number] => 12858181 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/858181
Method and apparatus for adaptively modifying a pulse width of a pulse width modulated output Aug 16, 2010 Issued
Array ( [id] => 10087919 [patent_doc_number] => 09125281 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-01 [patent_title] => 'Method for controlling a voltage transformer for overvoltage protection, voltage transformer and operating device having a voltage transformer' [patent_app_type] => utility [patent_app_number] => 13/390011 [patent_app_country] => US [patent_app_date] => 2010-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 4170 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13390011 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/390011
Method for controlling a voltage transformer for overvoltage protection, voltage transformer and operating device having a voltage transformer Jul 22, 2010 Issued
Array ( [id] => 4488906 [patent_doc_number] => 07902899 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-08 [patent_title] => 'Apparatus and method of generating reference clock for DLL circuit' [patent_app_type] => utility [patent_app_number] => 12/820545 [patent_app_country] => US [patent_app_date] => 2010-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2713 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/902/07902899.pdf [firstpage_image] =>[orig_patent_app_number] => 12820545 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/820545
Apparatus and method of generating reference clock for DLL circuit Jun 21, 2010 Issued
Array ( [id] => 10011139 [patent_doc_number] => 09054676 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-09 [patent_title] => 'Active circulator' [patent_app_type] => utility [patent_app_number] => 13/805032 [patent_app_country] => US [patent_app_date] => 2010-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 5846 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 399 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13805032 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/805032
Active circulator Jun 17, 2010 Issued
Array ( [id] => 8284601 [patent_doc_number] => 08218712 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-07-10 [patent_title] => 'Method and apparatus for dividing clock frequencies' [patent_app_type] => utility [patent_app_number] => 12/796414 [patent_app_country] => US [patent_app_date] => 2010-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 6465 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12796414 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/796414
Method and apparatus for dividing clock frequencies Jun 7, 2010 Issued
Array ( [id] => 8376045 [patent_doc_number] => 08258842 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-09-04 [patent_title] => 'Dead-time detecting circuit for inductive load and modulation circuit using the same' [patent_app_type] => utility [patent_app_number] => 12/792741 [patent_app_country] => US [patent_app_date] => 2010-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3956 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12792741 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/792741
Dead-time detecting circuit for inductive load and modulation circuit using the same Jun 2, 2010 Issued
Array ( [id] => 8528538 [patent_doc_number] => 08305115 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-06 [patent_title] => 'Elimination of fractional N boundary spurs in a signal synthesizer' [patent_app_type] => utility [patent_app_number] => 12/790460 [patent_app_country] => US [patent_app_date] => 2010-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2824 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12790460 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/790460
Elimination of fractional N boundary spurs in a signal synthesizer May 27, 2010 Issued
Array ( [id] => 6331194 [patent_doc_number] => 20100327964 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-30 [patent_title] => 'Semiconductor device and method of removing semiconductor device noise' [patent_app_type] => utility [patent_app_number] => 12/801247 [patent_app_country] => US [patent_app_date] => 2010-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5783 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0327/20100327964.pdf [firstpage_image] =>[orig_patent_app_number] => 12801247 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/801247
Semiconductor device and method of removing semiconductor device noise May 27, 2010 Abandoned
Array ( [id] => 6091546 [patent_doc_number] => 20110001516 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-06 [patent_title] => 'CIRCUIT, APPARATUS, AND METHOD FOR SIGNAL TRANSFER' [patent_app_type] => utility [patent_app_number] => 12/783159 [patent_app_country] => US [patent_app_date] => 2010-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3918 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20110001516.pdf [firstpage_image] =>[orig_patent_app_number] => 12783159 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/783159
Circuit, apparatus, and method for signal transfer May 18, 2010 Issued
Array ( [id] => 8399142 [patent_doc_number] => 08269537 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-09-18 [patent_title] => 'Data transfer circuit and method with compensated clock jitter' [patent_app_type] => utility [patent_app_number] => 12/754794 [patent_app_country] => US [patent_app_date] => 2010-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 28 [patent_no_of_words] => 10526 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12754794 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/754794
Data transfer circuit and method with compensated clock jitter Apr 5, 2010 Issued
Array ( [id] => 9627409 [patent_doc_number] => 08797095 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-05 [patent_title] => 'Adaptive voltage scalers (AVS), systems, and related methods' [patent_app_type] => utility [patent_app_number] => 12/750123 [patent_app_country] => US [patent_app_date] => 2010-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 22 [patent_no_of_words] => 13163 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12750123 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/750123
Adaptive voltage scalers (AVS), systems, and related methods Mar 29, 2010 Issued
Array ( [id] => 7482305 [patent_doc_number] => 20110234265 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-29 [patent_title] => 'Programmable Frequency Divider' [patent_app_type] => utility [patent_app_number] => 12/731591 [patent_app_country] => US [patent_app_date] => 2010-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7405 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0234/20110234265.pdf [firstpage_image] =>[orig_patent_app_number] => 12731591 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/731591
Programmable frequency divider Mar 24, 2010 Issued
Array ( [id] => 7516085 [patent_doc_number] => 08040159 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-10-18 [patent_title] => 'Comparator with jitter mitigation' [patent_app_type] => utility [patent_app_number] => 12/729952 [patent_app_country] => US [patent_app_date] => 2010-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4062 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/040/08040159.pdf [firstpage_image] =>[orig_patent_app_number] => 12729952 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/729952
Comparator with jitter mitigation Mar 22, 2010 Issued
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