
Michael James Carey
Examiner (ID: 835)
| Most Active Art Unit | 3766 |
| Art Unit(s) | 3762, 4187, 3766, 3795, 3792 |
| Total Applications | 666 |
| Issued Applications | 554 |
| Pending Applications | 26 |
| Abandoned Applications | 95 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4597568
[patent_doc_number] => 07982516
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2011-07-19
[patent_title] => 'RC-based delay element and method for reducing frequency induced delay variation'
[patent_app_type] => utility
[patent_app_number] => 12/727363
[patent_app_country] => US
[patent_app_date] => 2010-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6799
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 142
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/982/07982516.pdf
[firstpage_image] =>[orig_patent_app_number] => 12727363
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/727363 | RC-based delay element and method for reducing frequency induced delay variation | Mar 18, 2010 | Issued |
Array
(
[id] => 4625027
[patent_doc_number] => 08004329
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2011-08-23
[patent_title] => 'Hardware performance monitor (HPM) with variable resolution for adaptive voltage scaling (AVS) systems'
[patent_app_type] => utility
[patent_app_number] => 12/661560
[patent_app_country] => US
[patent_app_date] => 2010-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 3759
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/004/08004329.pdf
[firstpage_image] =>[orig_patent_app_number] => 12661560
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/661560 | Hardware performance monitor (HPM) with variable resolution for adaptive voltage scaling (AVS) systems | Mar 18, 2010 | Issued |
Array
(
[id] => 9525013
[patent_doc_number] => 08749291
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-06-10
[patent_title] => 'LCD driving circuit with ESD protection'
[patent_app_type] => utility
[patent_app_number] => 12/724716
[patent_app_country] => US
[patent_app_date] => 2010-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 17
[patent_no_of_words] => 5961
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 185
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12724716
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/724716 | LCD driving circuit with ESD protection | Mar 15, 2010 | Issued |
Array
(
[id] => 7541062
[patent_doc_number] => 08058908
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-11-15
[patent_title] => 'Level detector, voltage generator, and semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 12/714732
[patent_app_country] => US
[patent_app_date] => 2010-03-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6243
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/058/08058908.pdf
[firstpage_image] =>[orig_patent_app_number] => 12714732
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/714732 | Level detector, voltage generator, and semiconductor device | Feb 28, 2010 | Issued |
Array
(
[id] => 4458115
[patent_doc_number] => 07893737
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-02-22
[patent_title] => 'Charge pump for PLL/DLL'
[patent_app_type] => utility
[patent_app_number] => 12/714670
[patent_app_country] => US
[patent_app_date] => 2010-03-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 6054
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 183
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/893/07893737.pdf
[firstpage_image] =>[orig_patent_app_number] => 12714670
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/714670 | Charge pump for PLL/DLL | Feb 28, 2010 | Issued |
Array
(
[id] => 8470642
[patent_doc_number] => 08299824
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-10-30
[patent_title] => 'System providing a switched output signal and a high resolution output signal'
[patent_app_type] => utility
[patent_app_number] => 12/706570
[patent_app_country] => US
[patent_app_date] => 2010-02-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 12
[patent_no_of_words] => 10224
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12706570
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/706570 | System providing a switched output signal and a high resolution output signal | Feb 15, 2010 | Issued |
Array
(
[id] => 8215414
[patent_doc_number] => 08193834
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-06-05
[patent_title] => 'Multiple detection circuit for accessory jacks'
[patent_app_type] => utility
[patent_app_number] => 12/705183
[patent_app_country] => US
[patent_app_date] => 2010-02-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 13
[patent_no_of_words] => 6204
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/193/08193834.pdf
[firstpage_image] =>[orig_patent_app_number] => 12705183
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/705183 | Multiple detection circuit for accessory jacks | Feb 11, 2010 | Issued |
Array
(
[id] => 8956799
[patent_doc_number] => 08502581
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2013-08-06
[patent_title] => 'Multi-phase digital phase-locked loop device for pixel clock reconstruction'
[patent_app_type] => utility
[patent_app_number] => 12/658366
[patent_app_country] => US
[patent_app_date] => 2010-02-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 5371
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12658366
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/658366 | Multi-phase digital phase-locked loop device for pixel clock reconstruction | Feb 5, 2010 | Issued |
Array
(
[id] => 4518878
[patent_doc_number] => 07932760
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-04-26
[patent_title] => 'System and method for implementing a digital phase-locked loop'
[patent_app_type] => utility
[patent_app_number] => 12/657365
[patent_app_country] => US
[patent_app_date] => 2010-01-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 13
[patent_no_of_words] => 5234
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 159
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/932/07932760.pdf
[firstpage_image] =>[orig_patent_app_number] => 12657365
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/657365 | System and method for implementing a digital phase-locked loop | Jan 18, 2010 | Issued |
Array
(
[id] => 4446414
[patent_doc_number] => 07863954
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-01-04
[patent_title] => 'Timing vernier using a delay locked loop'
[patent_app_type] => utility
[patent_app_number] => 12/687541
[patent_app_country] => US
[patent_app_date] => 2010-01-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 6489
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 154
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/863/07863954.pdf
[firstpage_image] =>[orig_patent_app_number] => 12687541
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/687541 | Timing vernier using a delay locked loop | Jan 13, 2010 | Issued |
Array
(
[id] => 8190732
[patent_doc_number] => 08183907
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-05-22
[patent_title] => 'Detection circuit and sensor device'
[patent_app_type] => utility
[patent_app_number] => 12/686674
[patent_app_country] => US
[patent_app_date] => 2010-01-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 18
[patent_no_of_words] => 18357
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/183/08183907.pdf
[firstpage_image] =>[orig_patent_app_number] => 12686674
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/686674 | Detection circuit and sensor device | Jan 12, 2010 | Issued |
Array
(
[id] => 4434167
[patent_doc_number] => 07969204
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2011-06-28
[patent_title] => 'Sample hold circuit and method thereof for eliminating offset voltage of analog signal'
[patent_app_type] => utility
[patent_app_number] => 12/642875
[patent_app_country] => US
[patent_app_date] => 2009-12-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 4666
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 188
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/969/07969204.pdf
[firstpage_image] =>[orig_patent_app_number] => 12642875
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/642875 | Sample hold circuit and method thereof for eliminating offset voltage of analog signal | Dec 20, 2009 | Issued |
Array
(
[id] => 5964646
[patent_doc_number] => 20110148504
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-06-23
[patent_title] => 'APPARATUS AND METHOD FOR HDMI TRANSMISSION'
[patent_app_type] => utility
[patent_app_number] => 12/643805
[patent_app_country] => US
[patent_app_date] => 2009-12-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 8951
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0148/20110148504.pdf
[firstpage_image] =>[orig_patent_app_number] => 12643805
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/643805 | Apparatus and method for HDMI transmission | Dec 20, 2009 | Issued |
Array
(
[id] => 6396088
[patent_doc_number] => 20100164550
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-07-01
[patent_title] => 'COMPARING DEVICE HAVING HYSTERESIS CHARACTERISTICS AND VOLTAGE REGULATOR USING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/642019
[patent_app_country] => US
[patent_app_date] => 2009-12-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6301
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0164/20100164550.pdf
[firstpage_image] =>[orig_patent_app_number] => 12642019
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/642019 | Comparing device having hysteresis characteristics and voltage regulator using the same | Dec 17, 2009 | Issued |
Array
(
[id] => 4597574
[patent_doc_number] => 07982520
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-07-19
[patent_title] => 'Signal generating apparatus and test apparatus'
[patent_app_type] => utility
[patent_app_number] => 12/642706
[patent_app_country] => US
[patent_app_date] => 2009-12-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 23
[patent_no_of_words] => 11946
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 171
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/982/07982520.pdf
[firstpage_image] =>[orig_patent_app_number] => 12642706
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/642706 | Signal generating apparatus and test apparatus | Dec 17, 2009 | Issued |
Array
(
[id] => 8029683
[patent_doc_number] => 08143923
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-03-27
[patent_title] => 'Circuit and method for determining a current'
[patent_app_type] => utility
[patent_app_number] => 12/632600
[patent_app_country] => US
[patent_app_date] => 2009-12-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 3731
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/143/08143923.pdf
[firstpage_image] =>[orig_patent_app_number] => 12632600
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/632600 | Circuit and method for determining a current | Dec 6, 2009 | Issued |
Array
(
[id] => 4512064
[patent_doc_number] => 07915947
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-03-29
[patent_title] => 'PTAT sensor and temperature sensing method thereof'
[patent_app_type] => utility
[patent_app_number] => 12/631138
[patent_app_country] => US
[patent_app_date] => 2009-12-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 10
[patent_no_of_words] => 5160
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 57
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/915/07915947.pdf
[firstpage_image] =>[orig_patent_app_number] => 12631138
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/631138 | PTAT sensor and temperature sensing method thereof | Dec 3, 2009 | Issued |
Array
(
[id] => 4625042
[patent_doc_number] => 08004344
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-08-23
[patent_title] => 'Gate-charge retaining switch'
[patent_app_type] => utility
[patent_app_number] => 12/617260
[patent_app_country] => US
[patent_app_date] => 2009-11-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4029
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/004/08004344.pdf
[firstpage_image] =>[orig_patent_app_number] => 12617260
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/617260 | Gate-charge retaining switch | Nov 11, 2009 | Issued |
Array
(
[id] => 8470643
[patent_doc_number] => 08299825
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-10-30
[patent_title] => 'Electronic age detection circuit'
[patent_app_type] => utility
[patent_app_number] => 12/610142
[patent_app_country] => US
[patent_app_date] => 2009-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 10
[patent_no_of_words] => 7727
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 24
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12610142
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/610142 | Electronic age detection circuit | Oct 29, 2009 | Issued |
Array
(
[id] => 6306042
[patent_doc_number] => 20100109721
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-05-06
[patent_title] => 'SYSTEM FOR DETECTING A RESET CONDITION IN AN ELECTRONIC CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 12/610082
[patent_app_country] => US
[patent_app_date] => 2009-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2535
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0109/20100109721.pdf
[firstpage_image] =>[orig_patent_app_number] => 12610082
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/610082 | System for detecting a reset condition in an electronic circuit | Oct 29, 2009 | Issued |