Search

Michael James Carey

Examiner (ID: 835)

Most Active Art Unit
3766
Art Unit(s)
3762, 4187, 3766, 3795, 3792
Total Applications
666
Issued Applications
554
Pending Applications
26
Abandoned Applications
95

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4518864 [patent_doc_number] => 07911241 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-03-22 [patent_title] => 'Frequency synthesizer circuit comprising a phase locked loop' [patent_app_type] => utility [patent_app_number] => 12/608522 [patent_app_country] => US [patent_app_date] => 2009-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4718 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/911/07911241.pdf [firstpage_image] =>[orig_patent_app_number] => 12608522 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/608522
Frequency synthesizer circuit comprising a phase locked loop Oct 28, 2009 Issued
Array ( [id] => 4497176 [patent_doc_number] => 07956658 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-06-07 [patent_title] => 'Digital lock detector and frequency synthesizer using the same' [patent_app_type] => utility [patent_app_number] => 12/607395 [patent_app_country] => US [patent_app_date] => 2009-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 4121 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/956/07956658.pdf [firstpage_image] =>[orig_patent_app_number] => 12607395 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/607395
Digital lock detector and frequency synthesizer using the same Oct 27, 2009 Issued
Array ( [id] => 6121661 [patent_doc_number] => 20110084732 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-14 [patent_title] => 'UNIVERSAL CMOS CURRENT-MODE ANALOG FUNCTION SYNTHESIZER' [patent_app_type] => utility [patent_app_number] => 12/588351 [patent_app_country] => US [patent_app_date] => 2009-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 5894 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0084/20110084732.pdf [firstpage_image] =>[orig_patent_app_number] => 12588351 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/588351
Universal CMOS current-mode analog function synthesizer Oct 12, 2009 Issued
Array ( [id] => 4434168 [patent_doc_number] => 07969205 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-06-28 [patent_title] => 'Peak power reduction method' [patent_app_type] => utility [patent_app_number] => 12/577019 [patent_app_country] => US [patent_app_date] => 2009-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6286 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/969/07969205.pdf [firstpage_image] =>[orig_patent_app_number] => 12577019 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/577019
Peak power reduction method Oct 8, 2009 Issued
Array ( [id] => 8653693 [patent_doc_number] => 08373444 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-12 [patent_title] => 'Time-domain voltage comparator for analog-to-digital converter' [patent_app_type] => utility [patent_app_number] => 12/663732 [patent_app_country] => US [patent_app_date] => 2009-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5876 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 301 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12663732 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/663732
Time-domain voltage comparator for analog-to-digital converter Oct 6, 2009 Issued
Array ( [id] => 4504447 [patent_doc_number] => 07919994 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-05 [patent_title] => 'Reception comparator for signal modulation upon a supply line' [patent_app_type] => utility [patent_app_number] => 12/569079 [patent_app_country] => US [patent_app_date] => 2009-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 7604 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/919/07919994.pdf [firstpage_image] =>[orig_patent_app_number] => 12569079 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/569079
Reception comparator for signal modulation upon a supply line Sep 28, 2009 Issued
Array ( [id] => 8376052 [patent_doc_number] => 08258849 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-09-04 [patent_title] => 'Method and an apparatus for processing a signal' [patent_app_type] => utility [patent_app_number] => 12/567285 [patent_app_country] => US [patent_app_date] => 2009-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 20 [patent_no_of_words] => 12652 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12567285 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/567285
Method and an apparatus for processing a signal Sep 24, 2009 Issued
Array ( [id] => 9075196 [patent_doc_number] => 08552778 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-08 [patent_title] => 'Duty cycle corrector and duty cycle correction method' [patent_app_type] => utility [patent_app_number] => 13/392638 [patent_app_country] => US [patent_app_date] => 2009-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 6917 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13392638 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/392638
Duty cycle corrector and duty cycle correction method Sep 23, 2009 Issued
Array ( [id] => 4463363 [patent_doc_number] => 07880532 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-02-01 [patent_title] => 'Reference voltage generating circuit' [patent_app_type] => utility [patent_app_number] => 12/566240 [patent_app_country] => US [patent_app_date] => 2009-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 8200 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/880/07880532.pdf [firstpage_image] =>[orig_patent_app_number] => 12566240 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/566240
Reference voltage generating circuit Sep 23, 2009 Issued
Array ( [id] => 9100453 [patent_doc_number] => 08564336 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-22 [patent_title] => 'Clock frequency divider circuit and clock frequency division method' [patent_app_type] => utility [patent_app_number] => 13/058466 [patent_app_country] => US [patent_app_date] => 2009-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 19408 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13058466 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/058466
Clock frequency divider circuit and clock frequency division method Jul 29, 2009 Issued
Array ( [id] => 7531022 [patent_doc_number] => 07843247 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-11-30 [patent_title] => 'Method and apparatus for controlled voltage level shifting' [patent_app_type] => utility [patent_app_number] => 12/506024 [patent_app_country] => US [patent_app_date] => 2009-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5541 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/843/07843247.pdf [firstpage_image] =>[orig_patent_app_number] => 12506024 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/506024
Method and apparatus for controlled voltage level shifting Jul 19, 2009 Issued
Array ( [id] => 4619888 [patent_doc_number] => 07999609 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-16 [patent_title] => 'Managed wideband radio frequency distribution system with signal level enabling interface device and impedance signature detection' [patent_app_type] => utility [patent_app_number] => 12/505189 [patent_app_country] => US [patent_app_date] => 2009-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3793 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/999/07999609.pdf [firstpage_image] =>[orig_patent_app_number] => 12505189 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/505189
Managed wideband radio frequency distribution system with signal level enabling interface device and impedance signature detection Jul 16, 2009 Issued
Array ( [id] => 4554835 [patent_doc_number] => 07961022 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-06-14 [patent_title] => 'Pulsed width modulated control method and apparatus' [patent_app_type] => utility [patent_app_number] => 12/500923 [patent_app_country] => US [patent_app_date] => 2009-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6962 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/961/07961022.pdf [firstpage_image] =>[orig_patent_app_number] => 12500923 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/500923
Pulsed width modulated control method and apparatus Jul 9, 2009 Issued
Array ( [id] => 6324516 [patent_doc_number] => 20100244927 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-30 [patent_title] => 'SPUR ATTENUATION DEVICES, SYSTEMS, AND METHODS' [patent_app_type] => utility [patent_app_number] => 12/494068 [patent_app_country] => US [patent_app_date] => 2009-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5598 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0244/20100244927.pdf [firstpage_image] =>[orig_patent_app_number] => 12494068 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/494068
Spur attenuation devices, systems, and methods Jun 28, 2009 Issued
Array ( [id] => 9324308 [patent_doc_number] => 08659335 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-25 [patent_title] => 'Method and system for controlling radio frequency power' [patent_app_type] => utility [patent_app_number] => 12/491538 [patent_app_country] => US [patent_app_date] => 2009-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 13719 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12491538 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/491538
Method and system for controlling radio frequency power Jun 24, 2009 Issued
Array ( [id] => 5300793 [patent_doc_number] => 20090295445 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-03 [patent_title] => 'DOUBLE-EDGE PWM CONTROLLER AND ITS CONTROL METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/476526 [patent_app_country] => US [patent_app_date] => 2009-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 2952 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0295/20090295445.pdf [firstpage_image] =>[orig_patent_app_number] => 12476526 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/476526
Double-edge PWM controller and its control method thereof Jun 1, 2009 Issued
Array ( [id] => 6378840 [patent_doc_number] => 20100301913 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-02 [patent_title] => 'CMOS Clock Receiver with Feedback Loop Error Corrections' [patent_app_type] => utility [patent_app_number] => 12/475866 [patent_app_country] => US [patent_app_date] => 2009-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4494 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0301/20100301913.pdf [firstpage_image] =>[orig_patent_app_number] => 12475866 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/475866
CMOS clock receiver with feedback loop error corrections May 31, 2009 Issued
Array ( [id] => 8233485 [patent_doc_number] => 08198931 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-12 [patent_title] => 'Fine grain timing' [patent_app_type] => utility [patent_app_number] => 12/430854 [patent_app_country] => US [patent_app_date] => 2009-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 21 [patent_no_of_words] => 12551 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/198/08198931.pdf [firstpage_image] =>[orig_patent_app_number] => 12430854 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/430854
Fine grain timing Apr 26, 2009 Issued
Array ( [id] => 8340900 [patent_doc_number] => 08242823 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-14 [patent_title] => 'Delay chain initialization' [patent_app_type] => utility [patent_app_number] => 12/430846 [patent_app_country] => US [patent_app_date] => 2009-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 21 [patent_no_of_words] => 12495 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12430846 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/430846
Delay chain initialization Apr 26, 2009 Issued
Array ( [id] => 6539208 [patent_doc_number] => 20100271076 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-28 [patent_title] => 'PRECISION SAMPLING CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/430840 [patent_app_country] => US [patent_app_date] => 2009-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 12501 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0271/20100271076.pdf [firstpage_image] =>[orig_patent_app_number] => 12430840 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/430840
Precision sampling circuit Apr 26, 2009 Issued
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