
Michael James Carey
Examiner (ID: 835)
| Most Active Art Unit | 3766 |
| Art Unit(s) | 3762, 4187, 3766, 3795, 3792 |
| Total Applications | 666 |
| Issued Applications | 554 |
| Pending Applications | 26 |
| Abandoned Applications | 95 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5353392
[patent_doc_number] => 20090184736
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-07-23
[patent_title] => 'FLEXIBLE WAVEFORM GENERATOR WITH EXTENDED RANGE CAPABILITY'
[patent_app_type] => utility
[patent_app_number] => 12/179712
[patent_app_country] => US
[patent_app_date] => 2008-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
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[pdf_file] => publications/A1/0184/20090184736.pdf
[firstpage_image] =>[orig_patent_app_number] => 12179712
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/179712 | Flexible waveform generator with extended range capability | Jul 24, 2008 | Issued |
Array
(
[id] => 4444243
[patent_doc_number] => 07928773
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-04-19
[patent_title] => 'Multiple frequency synchronized phase clock generator'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/169631 | Multiple frequency synchronized phase clock generator | Jul 8, 2008 | Issued |
Array
(
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[patent_doc_number] => 07667507
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[patent_kind] => B2
[patent_issue_date] => 2010-02-23
[patent_title] => 'Edge-timing adjustment circuit'
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[patent_app_number] => 12/146663
[patent_app_country] => US
[patent_app_date] => 2008-06-26
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Array
(
[id] => 229405
[patent_doc_number] => 07602220
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[patent_kind] => B1
[patent_issue_date] => 2009-10-13
[patent_title] => 'Resistor-input transconductor including common-mode compensation'
[patent_app_type] => utility
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[patent_app_country] => US
[patent_app_date] => 2008-06-24
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[patent_drawing_sheets_cnt] => 6
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/145475 | Resistor-input transconductor including common-mode compensation | Jun 23, 2008 | Issued |
Array
(
[id] => 163610
[patent_doc_number] => 07671650
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[patent_kind] => B2
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[patent_title] => 'Timing vernier using a delay locked loop'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/144186 | Timing vernier using a delay locked loop | Jun 22, 2008 | Issued |
Array
(
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[patent_doc_number] => 07616035
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[patent_kind] => B2
[patent_issue_date] => 2009-11-10
[patent_title] => 'Charge pump for PLL/DLL'
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Array
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Array
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[id] => 221550
[patent_doc_number] => 07609096
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2009-10-27
[patent_title] => 'Frequency synthesizer and method for constructing the same'
[patent_app_type] => utility
[patent_app_number] => 12/138936
[patent_app_country] => US
[patent_app_date] => 2008-06-13
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[pdf_file] => patents/07/609/07609096.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/138936 | Frequency synthesizer and method for constructing the same | Jun 12, 2008 | Issued |
Array
(
[id] => 5420242
[patent_doc_number] => 20090146697
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-06-11
[patent_title] => 'CIRCUIT FOR BUFFERING HAVING A COUPLER'
[patent_app_type] => utility
[patent_app_number] => 12/137127
[patent_app_country] => US
[patent_app_date] => 2008-06-11
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/137127 | CIRCUIT FOR BUFFERING HAVING A COUPLER | Jun 10, 2008 | Abandoned |
Array
(
[id] => 6386107
[patent_doc_number] => 20100176847
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-07-15
[patent_title] => 'VOLTAGE-CURRENT CONVERTER AND FILTER CIRCUIT USING SAME'
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[patent_app_number] => 12/602548
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[patent_app_date] => 2008-06-04
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/602548 | Voltage-current converter and filter circuit using same | Jun 3, 2008 | Issued |
Array
(
[id] => 4539808
[patent_doc_number] => 07888973
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[patent_issue_date] => 2011-02-15
[patent_title] => 'Matrix time-to-digital conversion frequency synthesizer'
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Array
(
[id] => 4488867
[patent_doc_number] => 07902888
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[patent_title] => 'Charge pump with reduced current mismatch'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/121740 | Charge pump with reduced current mismatch | May 14, 2008 | Issued |
| 12/118178 | METHOD AND APPARATUS FOR CONTROLLED VOLTAGE LEVEL SHIFTING | May 8, 2008 | Abandoned |
Array
(
[id] => 4811122
[patent_doc_number] => 20080191753
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[patent_title] => 'Methods and Systems for Locally Generating Non-Integral Divided Clocks with Centralized State Machines'
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Array
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[patent_title] => 'Low power high slew non-linear amplifier for use in clock generation circuitry for noisy environments'
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[patent_title] => 'HIGH FREQUENCY SWITCHING CIRCUIT'
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Array
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[patent_title] => 'Simplified Circuit to Use a Normally Conducting Circuit Element That Requires a Normally Blocking Circuit Element'
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Array
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