Search

Michael P. Ferguson

Examiner (ID: 7246, Phone: (571)272-7081 , Office: P/3679 )

Most Active Art Unit
3679
Art Unit(s)
3629, 3679, 3678, 3619
Total Applications
1903
Issued Applications
1114
Pending Applications
150
Abandoned Applications
660

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19191598 [patent_doc_number] => 20240170511 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-23 [patent_title] => SEMICONDUCTOR CHIP AND MANUFACTURING METHOD THEREFOR, SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR, AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 18/551169 [patent_app_country] => US [patent_app_date] => 2022-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14083 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18551169 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/551169
SEMICONDUCTOR CHIP AND MANUFACTURING METHOD THEREFOR, SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR, AND ELECTRONIC DEVICE Jan 20, 2022 Pending
Array ( [id] => 18704875 [patent_doc_number] => 11791393 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-17 [patent_title] => Semiconductor device and method of forming the same [patent_app_type] => utility [patent_app_number] => 17/579613 [patent_app_country] => US [patent_app_date] => 2022-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 9311 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17579613 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/579613
Semiconductor device and method of forming the same Jan 19, 2022 Issued
Array ( [id] => 18347045 [patent_doc_number] => 20230135155 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-04 [patent_title] => Atomic Layer Etching to Reduce Pattern Loading in High-K Dielectric Layer [patent_app_type] => utility [patent_app_number] => 17/648431 [patent_app_country] => US [patent_app_date] => 2022-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8134 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17648431 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/648431
Atomic Layer Etching to Reduce Pattern Loading in High-K Dielectric Layer Jan 19, 2022 Pending
Array ( [id] => 17582850 [patent_doc_number] => 20220139705 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-05 [patent_title] => METHOD OF FORMING OXIDE LAYER AND SEMICONDUCTOR STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/648420 [patent_app_country] => US [patent_app_date] => 2022-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4079 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17648420 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/648420
METHOD OF FORMING OXIDE LAYER AND SEMICONDUCTOR STRUCTURE Jan 18, 2022 Abandoned
Array ( [id] => 18219474 [patent_doc_number] => 11594423 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-28 [patent_title] => Forming method of capacitor array and semiconductor structure [patent_app_type] => utility [patent_app_number] => 17/648144 [patent_app_country] => US [patent_app_date] => 2022-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 5292 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17648144 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/648144
Forming method of capacitor array and semiconductor structure Jan 16, 2022 Issued
Array ( [id] => 19038068 [patent_doc_number] => 20240087883 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => METHOD FOR FORMING SILICON-CONTAINING FILM AND FILM FORMING APPARATUS [patent_app_type] => utility [patent_app_number] => 18/271898 [patent_app_country] => US [patent_app_date] => 2022-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4691 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18271898 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/271898
METHOD FOR FORMING SILICON-CONTAINING FILM AND FILM FORMING APPARATUS Jan 10, 2022 Pending
Array ( [id] => 17551779 [patent_doc_number] => 20220123121 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-21 [patent_title] => HIGH VOLTAGE TRANSISTOR STRUCTURE AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/564104 [patent_app_country] => US [patent_app_date] => 2021-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2582 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17564104 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/564104
High voltage transistor structure and method of fabricating the same Dec 27, 2021 Issued
Array ( [id] => 18456361 [patent_doc_number] => 20230197643 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => METAL INSULATOR METAL (MIM) CAPACITORS WITH PYROCHLORE-BASED INSULATORS FOR INTEGRATED CIRCUIT DIE & PACKAGES [patent_app_type] => utility [patent_app_number] => 17/560062 [patent_app_country] => US [patent_app_date] => 2021-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8401 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17560062 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/560062
METAL INSULATOR METAL (MIM) CAPACITORS WITH PYROCHLORE-BASED INSULATORS FOR INTEGRATED CIRCUIT DIE & PACKAGES Dec 21, 2021 Abandoned
Array ( [id] => 17676655 [patent_doc_number] => 20220189822 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-16 [patent_title] => WAFER BONDING METHOD AND BONDED WAFER [patent_app_type] => utility [patent_app_number] => 17/644135 [patent_app_country] => US [patent_app_date] => 2021-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11498 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17644135 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/644135
Wafer bonding method and bonded wafer Dec 13, 2021 Issued
Array ( [id] => 19123526 [patent_doc_number] => 11967520 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-23 [patent_title] => Method for making high-voltage thick gate oxide [patent_app_type] => utility [patent_app_number] => 17/531245 [patent_app_country] => US [patent_app_date] => 2021-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 2325 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17531245 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/531245
Method for making high-voltage thick gate oxide Nov 18, 2021 Issued
Array ( [id] => 19765993 [patent_doc_number] => 12224295 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-11 [patent_title] => Image sensor and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 17/455246 [patent_app_country] => US [patent_app_date] => 2021-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 21 [patent_no_of_words] => 10876 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17455246 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/455246
Image sensor and method of manufacturing the same Nov 16, 2021 Issued
Array ( [id] => 18840174 [patent_doc_number] => 11848253 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-19 [patent_title] => Semiconductor structure with an air gap [patent_app_type] => utility [patent_app_number] => 17/521805 [patent_app_country] => US [patent_app_date] => 2021-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4945 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17521805 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/521805
Semiconductor structure with an air gap Nov 7, 2021 Issued
Array ( [id] => 19046665 [patent_doc_number] => 11935785 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-19 [patent_title] => Method of manufacturing a semiconductor structure, and a semiconductor structure [patent_app_type] => utility [patent_app_number] => 17/453168 [patent_app_country] => US [patent_app_date] => 2021-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 25 [patent_no_of_words] => 8890 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 392 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17453168 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/453168
Method of manufacturing a semiconductor structure, and a semiconductor structure Oct 31, 2021 Issued
Array ( [id] => 17339550 [patent_doc_number] => 20220005881 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-06 [patent_title] => PIXEL ARRANGEMENT STRUCTURE AND DISPLAY PANEL [patent_app_type] => utility [patent_app_number] => 17/480075 [patent_app_country] => US [patent_app_date] => 2021-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6162 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17480075 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/480075
Pixel arrangement structure and display panel Sep 19, 2021 Issued
Array ( [id] => 17753052 [patent_doc_number] => 20220231257 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-21 [patent_title] => DISPLAY SUBSTRATE AND DISPLAY APPARATUS [patent_app_type] => utility [patent_app_number] => 17/480055 [patent_app_country] => US [patent_app_date] => 2021-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4315 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17480055 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/480055
Display substrate and display apparatus Sep 19, 2021 Issued
Array ( [id] => 17886447 [patent_doc_number] => 20220301925 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-22 [patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND ETCHING METHOD [patent_app_type] => utility [patent_app_number] => 17/475646 [patent_app_country] => US [patent_app_date] => 2021-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3383 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17475646 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/475646
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND ETCHING METHOD Sep 14, 2021 Abandoned
Array ( [id] => 17318855 [patent_doc_number] => 20210407905 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-30 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/447332 [patent_app_country] => US [patent_app_date] => 2021-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7395 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17447332 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/447332
Semiconductor memory device Sep 9, 2021 Issued
Array ( [id] => 19552839 [patent_doc_number] => 12136550 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-05 [patent_title] => Method for manufacturing a semiconductor structure and a semiconductor structure [patent_app_type] => utility [patent_app_number] => 17/447169 [patent_app_country] => US [patent_app_date] => 2021-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7350 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17447169 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/447169
Method for manufacturing a semiconductor structure and a semiconductor structure Sep 7, 2021 Issued
Array ( [id] => 20260746 [patent_doc_number] => 12433117 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-30 [patent_title] => Display substrate, preparation method therefor, and display apparatus [patent_app_type] => utility [patent_app_number] => 17/787604 [patent_app_country] => US [patent_app_date] => 2021-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 12378 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17787604 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/787604
Display substrate, preparation method therefor, and display apparatus Sep 1, 2021 Issued
Array ( [id] => 17509111 [patent_doc_number] => 20220102214 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-31 [patent_title] => MANUFACTURING METHOD OF DEVICE CHIP [patent_app_type] => utility [patent_app_number] => 17/446744 [patent_app_country] => US [patent_app_date] => 2021-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5788 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 266 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17446744 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/446744
Manufacturing method of device chip Sep 1, 2021 Issued
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