Michael P. Mcfadden

Array ( [id] => 9023439 [patent_doc_number] => 08533436 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-10 [patent_title] => 'Adaptively handling remote atomic execution based upon contention prediction' [patent_app_type] => utility [patent_app_number] => 12/492652 [patent_app_country] => US [patent_app_date] => 2009-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6560 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12492652 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6362799 [patent_doc_number] => 20100332808 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-30 [patent_title] => 'MINIMIZING CODE DUPLICATION IN AN UNBOUNDED TRANSACTIONAL MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/493168 [patent_app_country] => US [patent_app_date] => 2009-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 10252 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0332/20100332808.pdf [firstpage_image] =>[orig_patent_app_number] => 12493168 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6362720 [patent_doc_number] => 20100332796 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-30 [patent_title] => 'Method and System for a CPU-Local Storage Mechanism' [patent_app_type] => utility [patent_app_number] => 12/491534 [patent_app_country] => US [patent_app_date] => 2009-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4002 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0332/20100332796.pdf [firstpage_image] =>[orig_patent_app_number] => 12491534 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8998091 [patent_doc_number] => 08521996 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-27 [patent_title] => 'Pipelined microprocessor with fast non-selective correct conditional branch instruction resolution' [patent_app_type] => utility [patent_app_number] => 12/481511 [patent_app_country] => US [patent_app_date] => 2009-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 9295 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 259 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12481511 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9229757 [patent_doc_number] => 08635437 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-01-21 [patent_title] => 'Pipelined microprocessor with fast conditional branch instructions based on static exception state' [patent_app_type] => utility [patent_app_number] => 12/481427 [patent_app_country] => US [patent_app_date] => 2009-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 12418 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12481427 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6651506 [patent_doc_number] => 20100228950 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-09 [patent_title] => 'MICROPROCESSOR WITH FAST EXECUTION OF CALL AND RETURN INSTRUCTIONS' [patent_app_type] => utility [patent_app_number] => 12/481199 [patent_app_country] => US [patent_app_date] => 2009-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 13113 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0228/20100228950.pdf [firstpage_image] =>[orig_patent_app_number] => 12481199 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6554492 [patent_doc_number] => 20100205402 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-12 [patent_title] => 'PIPELINED MICROPROCESSOR WITH NORMAL AND FAST CONDITIONAL BRANCH INSTRUCTIONS' [patent_app_type] => utility [patent_app_number] => 12/481118 [patent_app_country] => US [patent_app_date] => 2009-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 12258 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0205/20100205402.pdf [firstpage_image] =>[orig_patent_app_number] => 12481118 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6301948 [patent_doc_number] => 20100161943 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-24 [patent_title] => 'PROCESSOR CAPABLE OF POWER CONSUMPTION SCALING' [patent_app_type] => utility [patent_app_number] => 12/479691 [patent_app_country] => US [patent_app_date] => 2009-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2803 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0161/20100161943.pdf [firstpage_image] =>[orig_patent_app_number] => 12479691 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10065589 [patent_doc_number] => 09104435 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-08-11 [patent_title] => 'Program and data annotation for hardware customization and energy optimization' [patent_app_type] => utility [patent_app_number] => 12/423374 [patent_app_country] => US [patent_app_date] => 2009-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6156 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12423374 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14555475 [patent_doc_number] => 10346199 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-09 [patent_title] => Handling exceptions related to corrupt application state [patent_app_type] => utility [patent_app_number] => 12/421649 [patent_app_country] => US [patent_app_date] => 2009-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5673 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12421649 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8667491 [patent_doc_number] => 08380964 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-19 [patent_title] => 'Processor including age tracking of issue queue instructions' [patent_app_type] => utility [patent_app_number] => 12/417878 [patent_app_country] => US [patent_app_date] => 2009-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 10206 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 244 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12417878 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14600983 [patent_doc_number] => 10353683 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-16 [patent_title] => Dynamically calculating and applying a timeout value to a manufacturer update service [patent_app_type] => utility [patent_app_number] => 12/418336 [patent_app_country] => US [patent_app_date] => 2009-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2622 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 292 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12418336 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6333141 [patent_doc_number] => 20100115529 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-06 [patent_title] => 'Memory management apparatus and method' [patent_app_type] => utility [patent_app_number] => 12/385260 [patent_app_country] => US [patent_app_date] => 2009-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2567 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0115/20100115529.pdf [firstpage_image] =>[orig_patent_app_number] => 12385260 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7682579 [patent_doc_number] => 20100241832 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-23 [patent_title] => 'Instruction fetching following changes in program flow' [patent_app_type] => utility [patent_app_number] => 12/382690 [patent_app_country] => US [patent_app_date] => 2009-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5442 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0241/20100241832.pdf [firstpage_image] =>[orig_patent_app_number] => 12382690 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8626953 [patent_doc_number] => 08359457 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-22 [patent_title] => 'Semiconductor device and data processing method performed by semiconductor device to perform a repeat operation within a reconfigurable pipeline' [patent_app_type] => utility [patent_app_number] => 12/372011 [patent_app_country] => US [patent_app_date] => 2009-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7848 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 373 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12372011 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5405610 [patent_doc_number] => 20090240925 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-24 [patent_title] => 'DEVICE, METHOD, AND COMPUTER PROGRAM PRODUCT THAT PROCESS MESSAGE' [patent_app_type] => utility [patent_app_number] => 12/372008 [patent_app_country] => US [patent_app_date] => 2009-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 13115 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0240/20090240925.pdf [firstpage_image] =>[orig_patent_app_number] => 12372008 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6554448 [patent_doc_number] => 20100205399 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-12 [patent_title] => 'PERFORMANCE COUNTER FOR MICROCODE INSTRUCTION EXECUTION' [patent_app_type] => utility [patent_app_number] => 12/370586 [patent_app_country] => US [patent_app_date] => 2009-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2664 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0205/20100205399.pdf [firstpage_image] =>[orig_patent_app_number] => 12370586 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6073590 [patent_doc_number] => 20110047353 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-24 [patent_title] => 'RECONFIGURABLE DEVICE' [patent_app_type] => utility [patent_app_number] => 12/865165 [patent_app_country] => US [patent_app_date] => 2009-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 13454 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0047/20110047353.pdf [firstpage_image] =>[orig_patent_app_number] => 12865165 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6481305 [patent_doc_number] => 20100192153 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-29 [patent_title] => 'SELECTING EXECUTING REQUESTS TO PREEMPT' [patent_app_type] => utility [patent_app_number] => 12/362202 [patent_app_country] => US [patent_app_date] => 2009-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2960 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0192/20100192153.pdf [firstpage_image] =>[orig_patent_app_number] => 12362202 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 231326 [patent_doc_number] => 07603497 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-10-13 [patent_title] => 'Method and apparatus to launch write queue read data in a microprocessor recovery unit' [patent_app_type] => utility [patent_app_number] => 12/360116 [patent_app_country] => US [patent_app_date] => 2009-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5176 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/603/07603497.pdf [firstpage_image] =>[orig_patent_app_number] => 12360116 [rel_patent_id] =>[rel_patent_doc_number] =>)