Search

Michael P. Mcfadden

Examiner (ID: 3028, Phone: (571)270-5649 , Office: P/2848 )

Most Active Art Unit
2848
Art Unit(s)
2848
Total Applications
1059
Issued Applications
876
Pending Applications
96
Abandoned Applications
127

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4508227 [patent_doc_number] => 07958342 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-06-07 [patent_title] => 'Methods for optimizing computer system performance counter utilization' [patent_app_type] => utility [patent_app_number] => 11/626833 [patent_app_country] => US [patent_app_date] => 2007-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3244 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/958/07958342.pdf [firstpage_image] =>[orig_patent_app_number] => 11626833 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/626833
Methods for optimizing computer system performance counter utilization Jan 23, 2007 Issued
Array ( [id] => 4774107 [patent_doc_number] => 20080059769 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-06 [patent_title] => 'MULTIPLE-CORE PROCESSOR SUPPORTING MULTIPLE INSTRUCTION SET ARCHITECTURES' [patent_app_type] => utility [patent_app_number] => 11/468547 [patent_app_country] => US [patent_app_date] => 2006-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2406 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20080059769.pdf [firstpage_image] =>[orig_patent_app_number] => 11468547 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/468547
Multiple-core processor supporting multiple instruction set architectures Aug 29, 2006 Issued
Array ( [id] => 4735447 [patent_doc_number] => 20080052429 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-28 [patent_title] => 'Off-board computational resources' [patent_app_type] => utility [patent_app_number] => 11/511190 [patent_app_country] => US [patent_app_date] => 2006-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9101 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20080052429.pdf [firstpage_image] =>[orig_patent_app_number] => 11511190 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/511190
Off-board computational resources Aug 27, 2006 Abandoned
Array ( [id] => 4735543 [patent_doc_number] => 20080052525 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-28 [patent_title] => 'Password recovery' [patent_app_type] => utility [patent_app_number] => 11/510922 [patent_app_country] => US [patent_app_date] => 2006-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9557 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20080052525.pdf [firstpage_image] =>[orig_patent_app_number] => 11510922 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/510922
Password recovery Aug 27, 2006 Abandoned
Array ( [id] => 4735508 [patent_doc_number] => 20080052490 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-28 [patent_title] => 'Computational resource array' [patent_app_type] => utility [patent_app_number] => 11/510894 [patent_app_country] => US [patent_app_date] => 2006-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 10002 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20080052490.pdf [firstpage_image] =>[orig_patent_app_number] => 11510894 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/510894
Computational resource array Aug 27, 2006 Abandoned
Array ( [id] => 4829406 [patent_doc_number] => 20080126472 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-29 [patent_title] => 'Computer communication' [patent_app_type] => utility [patent_app_number] => 11/510950 [patent_app_country] => US [patent_app_date] => 2006-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9204 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0126/20080126472.pdf [firstpage_image] =>[orig_patent_app_number] => 11510950 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/510950
Computer communication Aug 27, 2006 Abandoned
Array ( [id] => 5641738 [patent_doc_number] => 20060280193 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-14 [patent_title] => 'METHOD AND APPARATUS FOR PERFORMING PACKET CLASSIFICATION FOR POLICY-BASED PACKET ROUTING' [patent_app_type] => utility [patent_app_number] => 11/466395 [patent_app_country] => US [patent_app_date] => 2006-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 39 [patent_no_of_words] => 28922 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0280/20060280193.pdf [firstpage_image] =>[orig_patent_app_number] => 11466395 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/466395
METHOD AND APPARATUS FOR PERFORMING PACKET CLASSIFICATION FOR POLICY-BASED PACKET ROUTING Aug 21, 2006 Abandoned
Array ( [id] => 10885502 [patent_doc_number] => 08909905 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-09 [patent_title] => 'Method for performing plurality of bit operations and a device having plurality of bit operations capabilities' [patent_app_type] => utility [patent_app_number] => 12/377351 [patent_app_country] => US [patent_app_date] => 2006-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2665 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12377351 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/377351
Method for performing plurality of bit operations and a device having plurality of bit operations capabilities Aug 17, 2006 Issued
Array ( [id] => 8149264 [patent_doc_number] => 08166283 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-24 [patent_title] => 'Generator of a signal with an adjustable waveform' [patent_app_type] => utility [patent_app_number] => 11/502343 [patent_app_country] => US [patent_app_date] => 2006-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 17 [patent_no_of_words] => 5838 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/166/08166283.pdf [firstpage_image] =>[orig_patent_app_number] => 11502343 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/502343
Generator of a signal with an adjustable waveform Aug 9, 2006 Issued
Array ( [id] => 4653319 [patent_doc_number] => 20080040576 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-14 [patent_title] => 'Associate Cached Branch Information with the Last Granularity of Branch instruction in Variable Length instruction Set' [patent_app_type] => utility [patent_app_number] => 11/463370 [patent_app_country] => US [patent_app_date] => 2006-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4160 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0040/20080040576.pdf [firstpage_image] =>[orig_patent_app_number] => 11463370 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/463370
Associate Cached Branch Information with the Last Granularity of Branch instruction in Variable Length instruction Set Aug 8, 2006 Abandoned
Array ( [id] => 5610253 [patent_doc_number] => 20060271769 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-30 [patent_title] => 'Selectively deferring instructions issued in program order utilizing a checkpoint and instruction deferral scheme' [patent_app_type] => utility [patent_app_number] => 11/495450 [patent_app_country] => US [patent_app_date] => 2006-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3077 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0271/20060271769.pdf [firstpage_image] =>[orig_patent_app_number] => 11495450 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/495450
Selectively deferring instructions issued in program order utilizing a checkpoint and instruction deferral scheme Jul 27, 2006 Abandoned
Array ( [id] => 8472677 [patent_doc_number] => 08301870 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-30 [patent_title] => 'Method and apparatus for fast synchronization and out-of-order execution of instructions in a meta-program based computing system' [patent_app_type] => utility [patent_app_number] => 11/493665 [patent_app_country] => US [patent_app_date] => 2006-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 7446 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11493665 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/493665
Method and apparatus for fast synchronization and out-of-order execution of instructions in a meta-program based computing system Jul 26, 2006 Issued
Array ( [id] => 5206595 [patent_doc_number] => 20070028077 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-01 [patent_title] => 'Pipeline processor, and method for automatically designing a pipeline processor' [patent_app_type] => utility [patent_app_number] => 11/492937 [patent_app_country] => US [patent_app_date] => 2006-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 11341 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0028/20070028077.pdf [firstpage_image] =>[orig_patent_app_number] => 11492937 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/492937
Pipeline processor, and method for automatically designing a pipeline processor Jul 25, 2006 Abandoned
Array ( [id] => 4911312 [patent_doc_number] => 20080022079 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-24 [patent_title] => 'EXECUTING AN ALLGATHER OPERATION WITH AN ALLTOALLV OPERATION IN A PARALLEL COMPUTER' [patent_app_type] => utility [patent_app_number] => 11/459387 [patent_app_country] => US [patent_app_date] => 2006-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10228 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0022/20080022079.pdf [firstpage_image] =>[orig_patent_app_number] => 11459387 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/459387
EXECUTING AN ALLGATHER OPERATION WITH AN ALLTOALLV OPERATION IN A PARALLEL COMPUTER Jul 23, 2006 Abandoned
Array ( [id] => 5155966 [patent_doc_number] => 20070038849 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-15 [patent_title] => 'Computing system and method' [patent_app_type] => utility [patent_app_number] => 11/491676 [patent_app_country] => US [patent_app_date] => 2006-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4146 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0038/20070038849.pdf [firstpage_image] =>[orig_patent_app_number] => 11491676 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/491676
Computing system and method Jul 23, 2006 Abandoned
Array ( [id] => 4911313 [patent_doc_number] => 20080022080 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-24 [patent_title] => 'Data access handling in a data processing system' [patent_app_type] => utility [patent_app_number] => 11/489722 [patent_app_country] => US [patent_app_date] => 2006-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4512 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0022/20080022080.pdf [firstpage_image] =>[orig_patent_app_number] => 11489722 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/489722
Data access handling in a data processing system Jul 19, 2006 Abandoned
Array ( [id] => 5243781 [patent_doc_number] => 20070022276 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-25 [patent_title] => 'Method and System for Processing a Work Item in a Pipelined Sequence' [patent_app_type] => utility [patent_app_number] => 11/458482 [patent_app_country] => US [patent_app_date] => 2006-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3480 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0022/20070022276.pdf [firstpage_image] =>[orig_patent_app_number] => 11458482 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/458482
Method and System for Processing a Work Item in a Pipelined Sequence Jul 18, 2006 Abandoned
Array ( [id] => 4979001 [patent_doc_number] => 20070220236 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-20 [patent_title] => 'Reconfigurable computing device' [patent_app_type] => utility [patent_app_number] => 11/488159 [patent_app_country] => US [patent_app_date] => 2006-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5474 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0220/20070220236.pdf [firstpage_image] =>[orig_patent_app_number] => 11488159 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/488159
Reconfigurable computing device Jul 17, 2006 Abandoned
Array ( [id] => 4911314 [patent_doc_number] => 20080022081 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-24 [patent_title] => 'LOCAL CONTROLLER FOR RECONFIGURABLE PROCESSING ELEMENTS' [patent_app_type] => utility [patent_app_number] => 11/458316 [patent_app_country] => US [patent_app_date] => 2006-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5063 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0022/20080022081.pdf [firstpage_image] =>[orig_patent_app_number] => 11458316 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/458316
LOCAL CONTROLLER FOR RECONFIGURABLE PROCESSING ELEMENTS Jul 17, 2006 Abandoned
Array ( [id] => 5024744 [patent_doc_number] => 20070150711 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-28 [patent_title] => 'Apparatus and method of exception handling for reconfigurable architecture' [patent_app_type] => utility [patent_app_number] => 11/487407 [patent_app_country] => US [patent_app_date] => 2006-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6130 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0150/20070150711.pdf [firstpage_image] =>[orig_patent_app_number] => 11487407 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/487407
Apparatus and method of exception handling for reconfigurable architecture Jul 16, 2006 Issued
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