
Michael R. Fleming
Examiner (ID: 18906)
| Most Active Art Unit | 2306 |
| Art Unit(s) | 2308, 2306 |
| Total Applications | 577 |
| Issued Applications | 543 |
| Pending Applications | 0 |
| Abandoned Applications | 34 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 2299901
[patent_doc_number] => 04660198
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-04-21
[patent_title] => 'Data capture logic for VLSI chips'
[patent_app_type] => 1
[patent_app_number] => 6/723386
[patent_app_country] => US
[patent_app_date] => 1985-04-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 5335
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 173
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/660/04660198.pdf
[firstpage_image] =>[orig_patent_app_number] => 723386
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/723386 | Data capture logic for VLSI chips | Apr 14, 1985 | Issued |
Array
(
[id] => 2275491
[patent_doc_number] => 04566106
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-01-21
[patent_title] => 'Electronic postage meter having redundant memory'
[patent_app_type] => 1
[patent_app_number] => 6/723001
[patent_app_country] => US
[patent_app_date] => 1985-04-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 3966
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/566/04566106.pdf
[firstpage_image] =>[orig_patent_app_number] => 723001
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/723001 | Electronic postage meter having redundant memory | Apr 14, 1985 | Issued |
Array
(
[id] => 2301235
[patent_doc_number] => 04653054
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-03-24
[patent_title] => 'Redundant clock combiner'
[patent_app_type] => 1
[patent_app_number] => 6/722894
[patent_app_country] => US
[patent_app_date] => 1985-04-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3157
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/653/04653054.pdf
[firstpage_image] =>[orig_patent_app_number] => 722894
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/722894 | Redundant clock combiner | Apr 11, 1985 | Issued |
Array
(
[id] => 2295185
[patent_doc_number] => 04679195
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-07-07
[patent_title] => 'Error tracking apparatus in a data processing system'
[patent_app_type] => 1
[patent_app_number] => 6/721564
[patent_app_country] => US
[patent_app_date] => 1985-04-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 4073
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 192
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/679/04679195.pdf
[firstpage_image] =>[orig_patent_app_number] => 721564
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/721564 | Error tracking apparatus in a data processing system | Apr 9, 1985 | Issued |
Array
(
[id] => 2364839
[patent_doc_number] => 04667327
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-05-19
[patent_title] => 'Error corrector for a linear feedback shift register sequence'
[patent_app_type] => 1
[patent_app_number] => 6/719385
[patent_app_country] => US
[patent_app_date] => 1985-04-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 3464
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/667/04667327.pdf
[firstpage_image] =>[orig_patent_app_number] => 719385
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/719385 | Error corrector for a linear feedback shift register sequence | Apr 1, 1985 | Issued |
Array
(
[id] => 2317659
[patent_doc_number] => 04675868
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-06-23
[patent_title] => 'Error correction system for difference set cyclic code in a teletext system'
[patent_app_type] => 1
[patent_app_number] => 6/716044
[patent_app_country] => US
[patent_app_date] => 1985-03-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 16
[patent_no_of_words] => 6900
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/675/04675868.pdf
[firstpage_image] =>[orig_patent_app_number] => 716044
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/716044 | Error correction system for difference set cyclic code in a teletext system | Mar 25, 1985 | Issued |
Array
(
[id] => 2335814
[patent_doc_number] => 04672612
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-06-09
[patent_title] => 'Error correction system in a teletext system'
[patent_app_type] => 1
[patent_app_number] => 6/716027
[patent_app_country] => US
[patent_app_date] => 1985-03-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 10
[patent_no_of_words] => 5803
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 375
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/672/04672612.pdf
[firstpage_image] =>[orig_patent_app_number] => 716027
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/716027 | Error correction system in a teletext system | Mar 25, 1985 | Issued |
Array
(
[id] => 2328808
[patent_doc_number] => 04670879
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-06-02
[patent_title] => 'Pattern generator'
[patent_app_type] => 1
[patent_app_number] => 6/702256
[patent_app_country] => US
[patent_app_date] => 1985-02-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 14
[patent_no_of_words] => 7042
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 58
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/670/04670879.pdf
[firstpage_image] =>[orig_patent_app_number] => 702256
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/702256 | Pattern generator | Feb 14, 1985 | Issued |
Array
(
[id] => 2321236
[patent_doc_number] => 04700347
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-10-13
[patent_title] => 'Digital phase adjustment'
[patent_app_type] => 1
[patent_app_number] => 6/701116
[patent_app_country] => US
[patent_app_date] => 1985-02-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 9
[patent_no_of_words] => 3009
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/700/04700347.pdf
[firstpage_image] =>[orig_patent_app_number] => 701116
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/701116 | Digital phase adjustment | Feb 12, 1985 | Issued |
Array
(
[id] => 2364505
[patent_doc_number] => 04665520
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-05-12
[patent_title] => 'Optimistic recovery in a distributed processing system'
[patent_app_type] => 1
[patent_app_number] => 6/697536
[patent_app_country] => US
[patent_app_date] => 1985-02-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 9637
[patent_no_of_claims] => 47
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 213
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/665/04665520.pdf
[firstpage_image] =>[orig_patent_app_number] => 697536
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/697536 | Optimistic recovery in a distributed processing system | Jan 31, 1985 | Issued |
Array
(
[id] => 2364515
[patent_doc_number] => 04665522
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-05-12
[patent_title] => 'Multi-channel redundant processing systems'
[patent_app_type] => 1
[patent_app_number] => 6/695636
[patent_app_country] => US
[patent_app_date] => 1985-01-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3566
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 155
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/665/04665522.pdf
[firstpage_image] =>[orig_patent_app_number] => 695636
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/695636 | Multi-channel redundant processing systems | Jan 27, 1985 | Issued |
Array
(
[id] => 2308491
[patent_doc_number] => 04674090
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-06-16
[patent_title] => 'Method of using complementary logic gates to test for faults in electronic components'
[patent_app_type] => 1
[patent_app_number] => 6/695586
[patent_app_country] => US
[patent_app_date] => 1985-01-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 5
[patent_no_of_words] => 4004
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 181
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/674/04674090.pdf
[firstpage_image] =>[orig_patent_app_number] => 695586
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/695586 | Method of using complementary logic gates to test for faults in electronic components | Jan 27, 1985 | Issued |
Array
(
[id] => 2364511
[patent_doc_number] => 04665521
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-05-12
[patent_title] => 'Portable testing device for monitoring communication line activity'
[patent_app_type] => 1
[patent_app_number] => 6/694716
[patent_app_country] => US
[patent_app_date] => 1985-01-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 3318
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 385
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/665/04665521.pdf
[firstpage_image] =>[orig_patent_app_number] => 694716
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/694716 | Portable testing device for monitoring communication line activity | Jan 24, 1985 | Issued |
Array
(
[id] => 2299449
[patent_doc_number] => 04660166
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-04-21
[patent_title] => 'Electronic network for collective decision based on large number of connections between signals'
[patent_app_type] => 1
[patent_app_number] => 6/693479
[patent_app_country] => US
[patent_app_date] => 1985-01-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 15
[patent_no_of_words] => 9733
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 179
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/660/04660166.pdf
[firstpage_image] =>[orig_patent_app_number] => 693479
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/693479 | Electronic network for collective decision based on large number of connections between signals | Jan 21, 1985 | Issued |
Array
(
[id] => 2348080
[patent_doc_number] => 04661955
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-04-28
[patent_title] => 'Extended error correction for package error correction codes'
[patent_app_type] => 1
[patent_app_number] => 6/692804
[patent_app_country] => US
[patent_app_date] => 1985-01-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 6941
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 279
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/661/04661955.pdf
[firstpage_image] =>[orig_patent_app_number] => 692804
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/692804 | Extended error correction for package error correction codes | Jan 17, 1985 | Issued |
Array
(
[id] => 2336691
[patent_doc_number] => 04635221
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-01-06
[patent_title] => 'Frequency multiplexed convolver communication system'
[patent_app_type] => 1
[patent_app_number] => 6/692798
[patent_app_country] => US
[patent_app_date] => 1985-01-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 8
[patent_no_of_words] => 4597
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 210
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/635/04635221.pdf
[firstpage_image] =>[orig_patent_app_number] => 692798
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/692798 | Frequency multiplexed convolver communication system | Jan 17, 1985 | Issued |
Array
(
[id] => 2228122
[patent_doc_number] => 04628512
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-12-09
[patent_title] => 'Address distribution in data storage apparatus'
[patent_app_type] => 1
[patent_app_number] => 6/690726
[patent_app_country] => US
[patent_app_date] => 1985-01-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 1108
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 142
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/628/04628512.pdf
[firstpage_image] =>[orig_patent_app_number] => 690726
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/690726 | Address distribution in data storage apparatus | Jan 10, 1985 | Issued |
Array
(
[id] => 2298295
[patent_doc_number] => 04639921
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-01-27
[patent_title] => 'Method and an apparatus for early bit collision detection'
[patent_app_type] => 1
[patent_app_number] => 6/690114
[patent_app_country] => US
[patent_app_date] => 1985-01-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 5652
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 178
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/639/04639921.pdf
[firstpage_image] =>[orig_patent_app_number] => 690114
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/690114 | Method and an apparatus for early bit collision detection | Jan 8, 1985 | Issued |
Array
(
[id] => 2359223
[patent_doc_number] => 04654850
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1987-03-31
[patent_title] => 'Tri-state in-circuit logic comparator with automatic input/output terminal discrimination'
[patent_app_type] => 1
[patent_app_number] => 6/688206
[patent_app_country] => US
[patent_app_date] => 1985-01-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 2987
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 174
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/654/04654850.pdf
[firstpage_image] =>[orig_patent_app_number] => 688206
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/688206 | Tri-state in-circuit logic comparator with automatic input/output terminal discrimination | Jan 1, 1985 | Issued |
Array
(
[id] => 2225558
[patent_doc_number] => 04631725
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1986-12-23
[patent_title] => 'Error correcting and detecting system'
[patent_app_type] => 1
[patent_app_number] => 6/686815
[patent_app_country] => US
[patent_app_date] => 1984-12-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 8937
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 405
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/631/04631725.pdf
[firstpage_image] =>[orig_patent_app_number] => 686815
[rel_patent_id] =>[rel_patent_doc_number] =>) 06/686815 | Error correcting and detecting system | Dec 26, 1984 | Issued |