
Michael R. Fleming
Examiner (ID: 18906)
| Most Active Art Unit | 2306 |
| Art Unit(s) | 2308, 2306 |
| Total Applications | 577 |
| Issued Applications | 543 |
| Pending Applications | 0 |
| Abandoned Applications | 34 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 2531564
[patent_doc_number] => 04881229
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-11-14
[patent_title] => 'Test circuit arrangement for a communication network and test method using same'
[patent_app_type] => 1
[patent_app_number] => 7/111935
[patent_app_country] => US
[patent_app_date] => 1987-10-21
[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 1990
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[pdf_file] => patents/04/881/04881229.pdf
[firstpage_image] =>[orig_patent_app_number] => 111935
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/111935 | Test circuit arrangement for a communication network and test method using same | Oct 20, 1987 | Issued |
Array
(
[id] => 2487020
[patent_doc_number] => 04876686
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-10-24
[patent_title] => 'Fault detection signal transmission system'
[patent_app_type] => 1
[patent_app_number] => 7/110316
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[patent_app_date] => 1987-10-20
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[pdf_file] => patents/04/876/04876686.pdf
[firstpage_image] =>[orig_patent_app_number] => 110316
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/110316 | Fault detection signal transmission system | Oct 19, 1987 | Issued |
Array
(
[id] => 2501527
[patent_doc_number] => 04860289
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-08-22
[patent_title] => 'Reset circuit for electrically isolated circuits communicating via uart'
[patent_app_type] => 1
[patent_app_number] => 7/110354
[patent_app_country] => US
[patent_app_date] => 1987-10-19
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 110354
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/110354 | Reset circuit for electrically isolated circuits communicating via uart | Oct 18, 1987 | Issued |
Array
(
[id] => 2527454
[patent_doc_number] => 04864501
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-09-05
[patent_title] => 'Word annotation system'
[patent_app_type] => 1
[patent_app_number] => 7/106224
[patent_app_country] => US
[patent_app_date] => 1987-10-07
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[pdf_file] => patents/04/864/04864501.pdf
[firstpage_image] =>[orig_patent_app_number] => 106224
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/106224 | Word annotation system | Oct 6, 1987 | Issued |
Array
(
[id] => 2527471
[patent_doc_number] => 04864502
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-09-05
[patent_title] => 'Sentence analyzer'
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[firstpage_image] =>[orig_patent_app_number] => 106535
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/106535 | Sentence analyzer | Oct 6, 1987 | Issued |
Array
(
[id] => 2498158
[patent_doc_number] => 04868750
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-09-19
[patent_title] => 'Collocational grammar system'
[patent_app_type] => 1
[patent_app_number] => 7/106127
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[patent_app_date] => 1987-10-07
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[pdf_file] => patents/04/868/04868750.pdf
[firstpage_image] =>[orig_patent_app_number] => 106127
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/106127 | Collocational grammar system | Oct 6, 1987 | Issued |
Array
(
[id] => 2573327
[patent_doc_number] => 04849973
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-07-18
[patent_title] => 'Test system for random access memory'
[patent_app_type] => 1
[patent_app_number] => 7/098144
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[pdf_file] => patents/04/849/04849973.pdf
[firstpage_image] =>[orig_patent_app_number] => 098144
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/098144 | Test system for random access memory | Sep 17, 1987 | Issued |
Array
(
[id] => 2638441
[patent_doc_number] => 04907228
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-03-06
[patent_title] => 'Dual-rail processor with error checking at single rail interfaces'
[patent_app_type] => 1
[patent_app_number] => 7/093584
[patent_app_country] => US
[patent_app_date] => 1987-09-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 53
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[patent_no_of_words] => 20174
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[pdf_file] => patents/04/907/04907228.pdf
[firstpage_image] =>[orig_patent_app_number] => 093584
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/093584 | Dual-rail processor with error checking at single rail interfaces | Sep 3, 1987 | Issued |
Array
(
[id] => 2499645
[patent_doc_number] => 04868827
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-09-19
[patent_title] => 'Digital data processing system'
[patent_app_type] => 1
[patent_app_number] => 7/089554
[patent_app_country] => US
[patent_app_date] => 1987-08-26
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/04/868/04868827.pdf
[firstpage_image] =>[orig_patent_app_number] => 089554
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/089554 | Digital data processing system | Aug 25, 1987 | Issued |
Array
(
[id] => 2487648
[patent_doc_number] => 04882731
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[patent_kind] => NA
[patent_issue_date] => 1989-11-21
[patent_title] => 'Data processing device composed of four data processing modules of identical construction, with protection both against simultaneous single-bit failures in the data processing modules and against failure of a single data processing module'
[patent_app_type] => 1
[patent_app_number] => 7/087185
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[pdf_file] => patents/04/882/04882731.pdf
[firstpage_image] =>[orig_patent_app_number] => 087185
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/087185 | Data processing device composed of four data processing modules of identical construction, with protection both against simultaneous single-bit failures in the data processing modules and against failure of a single data processing module | Aug 18, 1987 | Issued |
Array
(
[id] => 2499702
[patent_doc_number] => 04868830
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-09-19
[patent_title] => 'Method and apparatus for implementing a traceback maximum-likelihood decoder in a hypercube network'
[patent_app_type] => 1
[patent_app_number] => 7/086710
[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 086710
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/086710 | Method and apparatus for implementing a traceback maximum-likelihood decoder in a hypercube network | Aug 17, 1987 | Issued |
Array
(
[id] => 2501583
[patent_doc_number] => 04860292
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[patent_issue_date] => 1989-08-22
[patent_title] => 'Communication protocol'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/085096 | Communication protocol | Aug 12, 1987 | Issued |
Array
(
[id] => 2538493
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[patent_title] => 'Magnetic personal turning monitor'
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[firstpage_image] =>[orig_patent_app_number] => 083947
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/083947 | Magnetic personal turning monitor | Aug 3, 1987 | Issued |
Array
(
[id] => 2528980
[patent_doc_number] => 04864579
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[patent_issue_date] => 1989-09-05
[patent_title] => 'Semiconductor integrated circuit device'
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[firstpage_image] =>[orig_patent_app_number] => 081094
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/081094 | Semiconductor integrated circuit device | Aug 2, 1987 | Issued |
Array
(
[id] => 2496271
[patent_doc_number] => 04821271
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[patent_issue_date] => 1989-04-11
[patent_title] => 'Methods and circuits for checking integrated circuit chips having programmable outputs'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/079444 | Methods and circuits for checking integrated circuit chips having programmable outputs | Jul 29, 1987 | Issued |
Array
(
[id] => 2525383
[patent_doc_number] => 04852097
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[patent_title] => 'Method for forming data block protection information for serial data bit sequences by means of cyclical binary codes'
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[firstpage_image] =>[orig_patent_app_number] => 076002
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/076002 | Method for forming data block protection information for serial data bit sequences by means of cyclical binary codes | Jul 20, 1987 | Issued |
Array
(
[id] => 2573420
[patent_doc_number] => 04849978
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[patent_issue_date] => 1989-07-18
[patent_title] => 'Memory unit backup using checksum'
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[firstpage_image] =>[orig_patent_app_number] => 068862
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/068862 | Memory unit backup using checksum | Jul 1, 1987 | Issued |
Array
(
[id] => 2527512
[patent_doc_number] => 04870607
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/069095 | Error detection carried out by the use of unused modulo-m code | Jul 1, 1987 | Issued |
| 07/069285 | APPARATUS AND METHOD FOR DATA INDUCED CONDITION SIGNALING | Jun 30, 1987 | Abandoned |
Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/066275 | Testing circuit for random access memory device | Jun 24, 1987 | Issued |