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Michael Robert Reid

Examiner (ID: 6592, Phone: (313)446-4859 , Office: P/3753 )

Most Active Art Unit
3753
Art Unit(s)
3753
Total Applications
832
Issued Applications
616
Pending Applications
106
Abandoned Applications
154

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4590966 [patent_doc_number] => 07827394 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-02 [patent_title] => 'Methods and systems for configuring computers' [patent_app_type] => utility [patent_app_number] => 11/610959 [patent_app_country] => US [patent_app_date] => 2006-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2927 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/827/07827394.pdf [firstpage_image] =>[orig_patent_app_number] => 11610959 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/610959
Methods and systems for configuring computers Dec 13, 2006 Issued
Array ( [id] => 146824 [patent_doc_number] => 07694163 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-04-06 [patent_title] => 'System for generating and monitoring voltages generated for a variety of different components on a common printed circuit board' [patent_app_type] => utility [patent_app_number] => 11/610623 [patent_app_country] => US [patent_app_date] => 2006-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3990 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/694/07694163.pdf [firstpage_image] =>[orig_patent_app_number] => 11610623 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/610623
System for generating and monitoring voltages generated for a variety of different components on a common printed circuit board Dec 13, 2006 Issued
Array ( [id] => 213378 [patent_doc_number] => 07624297 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-11-24 [patent_title] => 'Architecture for a physical interface of a high speed front side bus' [patent_app_type] => utility [patent_app_number] => 11/610063 [patent_app_country] => US [patent_app_date] => 2006-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3893 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/624/07624297.pdf [firstpage_image] =>[orig_patent_app_number] => 11610063 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/610063
Architecture for a physical interface of a high speed front side bus Dec 12, 2006 Issued
Array ( [id] => 213369 [patent_doc_number] => 07624288 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-11-24 [patent_title] => 'System for controlling power supplies of an image formation apparatus' [patent_app_type] => utility [patent_app_number] => 11/609467 [patent_app_country] => US [patent_app_date] => 2006-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 20 [patent_no_of_words] => 10360 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/624/07624288.pdf [firstpage_image] =>[orig_patent_app_number] => 11609467 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/609467
System for controlling power supplies of an image formation apparatus Dec 11, 2006 Issued
Array ( [id] => 220436 [patent_doc_number] => 07613944 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-11-03 [patent_title] => 'Programmable local clock buffer capable of varying initial settings' [patent_app_type] => utility [patent_app_number] => 11/609403 [patent_app_country] => US [patent_app_date] => 2006-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 8036 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/613/07613944.pdf [firstpage_image] =>[orig_patent_app_number] => 11609403 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/609403
Programmable local clock buffer capable of varying initial settings Dec 11, 2006 Issued
Array ( [id] => 96886 [patent_doc_number] => 07734902 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-08 [patent_title] => 'Addition of a hardware component to a running system' [patent_app_type] => utility [patent_app_number] => 11/609427 [patent_app_country] => US [patent_app_date] => 2006-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2729 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/734/07734902.pdf [firstpage_image] =>[orig_patent_app_number] => 11609427 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/609427
Addition of a hardware component to a running system Dec 11, 2006 Issued
Array ( [id] => 5250863 [patent_doc_number] => 20070132319 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-06-14 [patent_title] => 'POWER-OFF CIRCUIT' [patent_app_type] => utility [patent_app_number] => 11/609314 [patent_app_country] => US [patent_app_date] => 2006-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2082 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0132/20070132319.pdf [firstpage_image] =>[orig_patent_app_number] => 11609314 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/609314
Power-off circuit Dec 10, 2006 Issued
Array ( [id] => 4895321 [patent_doc_number] => 20080104421 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-01 [patent_title] => 'AUTOMATIC POWER-UP OF PORTABLE ELECTRONIC DEVICE BASED ON TIME-DEPENDENT EVENT' [patent_app_type] => utility [patent_app_number] => 11/554168 [patent_app_country] => US [patent_app_date] => 2006-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4682 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0104/20080104421.pdf [firstpage_image] =>[orig_patent_app_number] => 11554168 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/554168
Automatic power-up portable electronic device based on time-dependent event Oct 29, 2006 Issued
Array ( [id] => 6191180 [patent_doc_number] => 20110173464 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-14 [patent_title] => 'Method and Apparatus for Processing Monitor State By an Access Network in Wireless Communication Systems' [patent_app_type] => utility [patent_app_number] => 12/091449 [patent_app_country] => US [patent_app_date] => 2006-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4715 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0173/20110173464.pdf [firstpage_image] =>[orig_patent_app_number] => 12091449 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/091449
Method and Apparatus for Processing Monitor State By an Access Network in Wireless Communication Systems Oct 26, 2006 Abandoned
Array ( [id] => 4469959 [patent_doc_number] => 07882344 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-02-01 [patent_title] => 'Memory system having a communication channel between a first processor and a second processor and memory management method that uses the communication channel' [patent_app_type] => utility [patent_app_number] => 11/553201 [patent_app_country] => US [patent_app_date] => 2006-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 18 [patent_no_of_words] => 7306 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/882/07882344.pdf [firstpage_image] =>[orig_patent_app_number] => 11553201 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/553201
Memory system having a communication channel between a first processor and a second processor and memory management method that uses the communication channel Oct 25, 2006 Issued
Array ( [id] => 126780 [patent_doc_number] => 07711944 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-04 [patent_title] => 'Method and apparatus for securely updating and booting code image' [patent_app_type] => utility [patent_app_number] => 11/586517 [patent_app_country] => US [patent_app_date] => 2006-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5210 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/711/07711944.pdf [firstpage_image] =>[orig_patent_app_number] => 11586517 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/586517
Method and apparatus for securely updating and booting code image Oct 25, 2006 Issued
Array ( [id] => 156259 [patent_doc_number] => 07681062 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-16 [patent_title] => 'Synchronous type semiconductor device for high speed data processing' [patent_app_type] => utility [patent_app_number] => 11/586510 [patent_app_country] => US [patent_app_date] => 2006-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6625 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/681/07681062.pdf [firstpage_image] =>[orig_patent_app_number] => 11586510 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/586510
Synchronous type semiconductor device for high speed data processing Oct 25, 2006 Issued
Array ( [id] => 76408 [patent_doc_number] => 07757073 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-13 [patent_title] => 'System configuration data sharing between multiple integrated circuits' [patent_app_type] => utility [patent_app_number] => 11/552846 [patent_app_country] => US [patent_app_date] => 2006-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4271 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/757/07757073.pdf [firstpage_image] =>[orig_patent_app_number] => 11552846 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/552846
System configuration data sharing between multiple integrated circuits Oct 24, 2006 Issued
Array ( [id] => 4881896 [patent_doc_number] => 20080155279 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-26 [patent_title] => 'System and method for optimizing computational density' [patent_app_type] => utility [patent_app_number] => 11/585619 [patent_app_country] => US [patent_app_date] => 2006-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4599 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0155/20080155279.pdf [firstpage_image] =>[orig_patent_app_number] => 11585619 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/585619
System and method for optimizing computational density Oct 23, 2006 Issued
Array ( [id] => 166740 [patent_doc_number] => 07673166 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-02 [patent_title] => 'Computation of processor clock frequency ratios' [patent_app_type] => utility [patent_app_number] => 11/586284 [patent_app_country] => US [patent_app_date] => 2006-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4702 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/673/07673166.pdf [firstpage_image] =>[orig_patent_app_number] => 11586284 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/586284
Computation of processor clock frequency ratios Oct 23, 2006 Issued
Array ( [id] => 5036633 [patent_doc_number] => 20070101172 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-03 [patent_title] => 'Semiconductor apparatus with protective measure against power consumption analysis' [patent_app_type] => utility [patent_app_number] => 11/583917 [patent_app_country] => US [patent_app_date] => 2006-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5882 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0101/20070101172.pdf [firstpage_image] =>[orig_patent_app_number] => 11583917 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/583917
Semiconductor apparatus with protective measure against power consumption analysis Oct 19, 2006 Abandoned
Array ( [id] => 5042244 [patent_doc_number] => 20070094526 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-04-26 [patent_title] => 'Information processing terminal and power control method' [patent_app_type] => utility [patent_app_number] => 11/582968 [patent_app_country] => US [patent_app_date] => 2006-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2436 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0094/20070094526.pdf [firstpage_image] =>[orig_patent_app_number] => 11582968 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/582968
Information processing terminal with wake on LAN and power control method thereof Oct 18, 2006 Issued
Array ( [id] => 4917641 [patent_doc_number] => 20080098242 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-24 [patent_title] => 'System and Method of Power Management for Computer Processor Systems' [patent_app_type] => utility [patent_app_number] => 11/551007 [patent_app_country] => US [patent_app_date] => 2006-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5068 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0098/20080098242.pdf [firstpage_image] =>[orig_patent_app_number] => 11551007 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/551007
System and method of power management for computer processor systems Oct 18, 2006 Issued
Array ( [id] => 192937 [patent_doc_number] => 07644264 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-01-05 [patent_title] => 'Method and system for creating and deploying disk images' [patent_app_type] => utility [patent_app_number] => 11/550327 [patent_app_country] => US [patent_app_date] => 2006-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9850 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/644/07644264.pdf [firstpage_image] =>[orig_patent_app_number] => 11550327 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/550327
Method and system for creating and deploying disk images Oct 16, 2006 Issued
Array ( [id] => 4956501 [patent_doc_number] => 20080189525 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-07 [patent_title] => 'IMPLEMENTING A TWO PHASE OPEN FIRMWARE DRIVER IN ADAPTER FCODE' [patent_app_type] => utility [patent_app_number] => 11/550139 [patent_app_country] => US [patent_app_date] => 2006-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3125 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0189/20080189525.pdf [firstpage_image] =>[orig_patent_app_number] => 11550139 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/550139
IMPLEMENTING A TWO PHASE OPEN FIRMWARE DRIVER IN ADAPTER FCODE Oct 16, 2006 Abandoned
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