Search

Michael Robert Reid

Examiner (ID: 6592, Phone: (313)446-4859 , Office: P/3753 )

Most Active Art Unit
3753
Art Unit(s)
3753
Total Applications
832
Issued Applications
616
Pending Applications
106
Abandoned Applications
154

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9276010 [patent_doc_number] => 08639957 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-01-28 [patent_title] => 'Method and apparatus for reducing power consumption in digital living network alliance network' [patent_app_type] => utility [patent_app_number] => 12/954725 [patent_app_country] => US [patent_app_date] => 2010-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 3690 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12954725 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/954725
Method and apparatus for reducing power consumption in digital living network alliance network Nov 25, 2010 Issued
Array ( [id] => 6147413 [patent_doc_number] => 20110131441 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-02 [patent_title] => 'SYSTEM INCLUDING PLURALITY OF STORAGE DEVICES AND DATA TRANSMISSION METHOD FOR THE SAME' [patent_app_type] => utility [patent_app_number] => 12/954561 [patent_app_country] => US [patent_app_date] => 2010-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 33388 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0131/20110131441.pdf [firstpage_image] =>[orig_patent_app_number] => 12954561 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/954561
System including plurality of storage devices and data transmission method for the same Nov 23, 2010 Issued
Array ( [id] => 8655433 [patent_doc_number] => 08375200 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-12 [patent_title] => 'Embedded device and file change notification method of the embedded device' [patent_app_type] => utility [patent_app_number] => 12/953465 [patent_app_country] => US [patent_app_date] => 2010-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1624 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12953465 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/953465
Embedded device and file change notification method of the embedded device Nov 23, 2010 Issued
Array ( [id] => 7759868 [patent_doc_number] => 20120030484 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-02 [patent_title] => 'DISPLAY APPARATUS WITH DUAL-SCREEN AND DISPLAY METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/953487 [patent_app_country] => US [patent_app_date] => 2010-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1214 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20120030484.pdf [firstpage_image] =>[orig_patent_app_number] => 12953487 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/953487
Display apparatus with dual-screen and display method thereof Nov 23, 2010 Issued
Array ( [id] => 8201793 [patent_doc_number] => 20120124363 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-17 [patent_title] => 'ANALYZING PERFORMANCE OF COMPUTING DEVICES IN USAGE SCENARIOS' [patent_app_type] => utility [patent_app_number] => 12/946229 [patent_app_country] => US [patent_app_date] => 2010-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 16318 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0124/20120124363.pdf [firstpage_image] =>[orig_patent_app_number] => 12946229 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/946229
Analyzing performance of computing devices in usage scenarios Nov 14, 2010 Issued
Array ( [id] => 8201833 [patent_doc_number] => 20120124402 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-17 [patent_title] => 'DETERMINING A POWER SAVING MODE BASED ON A HARDWARE RESOURCE UTILIZATION TREND' [patent_app_type] => utility [patent_app_number] => 12/946350 [patent_app_country] => US [patent_app_date] => 2010-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5130 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0124/20120124402.pdf [firstpage_image] =>[orig_patent_app_number] => 12946350 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/946350
Determining a power saving mode based on a hardware resource utilization trend Nov 14, 2010 Issued
Array ( [id] => 7588622 [patent_doc_number] => 20110283133 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-17 [patent_title] => 'Glitch-Free Clock Switching Circuit' [patent_app_type] => utility [patent_app_number] => 12/945744 [patent_app_country] => US [patent_app_date] => 2010-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2562 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0283/20110283133.pdf [firstpage_image] =>[orig_patent_app_number] => 12945744 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/945744
Glitch-free clock switching circuit Nov 11, 2010 Issued
Array ( [id] => 6088617 [patent_doc_number] => 20110145824 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-16 [patent_title] => 'SYSTEM AND METHOD FOR CONTROLLING CENTRAL PROCESSING UNIT POWER WITH REDUCED FREQUENCY OSCILLATIONS' [patent_app_type] => utility [patent_app_number] => 12/944378 [patent_app_country] => US [patent_app_date] => 2010-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5341 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0145/20110145824.pdf [firstpage_image] =>[orig_patent_app_number] => 12944378 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/944378
System and method for controlling central processing unit power with reduced frequency oscillations Nov 10, 2010 Issued
12/907798 OPTICAL DISC APPARATUS AND DISC APPARATUS Oct 18, 2010 Abandoned
Array ( [id] => 7482322 [patent_doc_number] => 20110234271 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-29 [patent_title] => 'HIGH RESOLUTION CLOCK SIGNAL GENERATOR' [patent_app_type] => utility [patent_app_number] => 12/892854 [patent_app_country] => US [patent_app_date] => 2010-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5089 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0234/20110234271.pdf [firstpage_image] =>[orig_patent_app_number] => 12892854 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/892854
High resolution clock signal generator Sep 27, 2010 Issued
Array ( [id] => 8530648 [patent_doc_number] => 08307232 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-11-06 [patent_title] => 'Power supply delivery for leakage suppression modes' [patent_app_type] => utility [patent_app_number] => 12/887930 [patent_app_country] => US [patent_app_date] => 2010-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2501 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12887930 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/887930
Power supply delivery for leakage suppression modes Sep 21, 2010 Issued
Array ( [id] => 9486540 [patent_doc_number] => 08732502 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-20 [patent_title] => 'Electronic device with serial ATA interface and power saving method for serial ATA buses' [patent_app_type] => utility [patent_app_number] => 12/879332 [patent_app_country] => US [patent_app_date] => 2010-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 8686 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12879332 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/879332
Electronic device with serial ATA interface and power saving method for serial ATA buses Sep 9, 2010 Issued
Array ( [id] => 6533971 [patent_doc_number] => 20100262854 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-14 [patent_title] => 'MANAGEMENT OF POWER STATES IN A PORTABLE COMPUTING DEVICE' [patent_app_type] => utility [patent_app_number] => 12/819358 [patent_app_country] => US [patent_app_date] => 2010-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2418 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0262/20100262854.pdf [firstpage_image] =>[orig_patent_app_number] => 12819358 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/819358
Management of power states in a portable computing device Jun 20, 2010 Issued
Array ( [id] => 6644077 [patent_doc_number] => 20100313055 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-09 [patent_title] => 'MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/788740 [patent_app_country] => US [patent_app_date] => 2010-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8690 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0313/20100313055.pdf [firstpage_image] =>[orig_patent_app_number] => 12788740 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/788740
Memory system May 26, 2010 Issued
Array ( [id] => 7577864 [patent_doc_number] => 20110291746 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-01 [patent_title] => 'REALTIME POWER MANAGEMENT OF INTEGRATED CIRCUITS' [patent_app_type] => utility [patent_app_number] => 12/788404 [patent_app_country] => US [patent_app_date] => 2010-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4566 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0291/20110291746.pdf [firstpage_image] =>[orig_patent_app_number] => 12788404 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/788404
Realtime power management of integrated circuits May 26, 2010 Issued
Array ( [id] => 8626959 [patent_doc_number] => 08359463 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-22 [patent_title] => 'Selecting a configuration for an application' [patent_app_type] => utility [patent_app_number] => 12/788013 [patent_app_country] => US [patent_app_date] => 2010-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4118 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12788013 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/788013
Selecting a configuration for an application May 25, 2010 Issued
Array ( [id] => 7582270 [patent_doc_number] => 20110296153 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-01 [patent_title] => 'OPTIMIZATION OF STORAGE DEVICE OPERATING PARAMETERS' [patent_app_type] => utility [patent_app_number] => 12/788126 [patent_app_country] => US [patent_app_date] => 2010-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4950 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0296/20110296153.pdf [firstpage_image] =>[orig_patent_app_number] => 12788126 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/788126
Optimization of storage device operating parameters May 25, 2010 Issued
Array ( [id] => 8667531 [patent_doc_number] => 08381004 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-19 [patent_title] => 'Optimizing energy consumption and application performance in a multi-core multi-threaded processor system' [patent_app_type] => utility [patent_app_number] => 12/787842 [patent_app_country] => US [patent_app_date] => 2010-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 14053 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12787842 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/787842
Optimizing energy consumption and application performance in a multi-core multi-threaded processor system May 25, 2010 Issued
Array ( [id] => 7582269 [patent_doc_number] => 20110296152 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-01 [patent_title] => 'BOOT MODE' [patent_app_type] => utility [patent_app_number] => 12/787976 [patent_app_country] => US [patent_app_date] => 2010-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6027 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0296/20110296152.pdf [firstpage_image] =>[orig_patent_app_number] => 12787976 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/787976
Boot mode May 25, 2010 Issued
Array ( [id] => 7582270 [patent_doc_number] => 20110296153 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-01 [patent_title] => 'OPTIMIZATION OF STORAGE DEVICE OPERATING PARAMETERS' [patent_app_type] => utility [patent_app_number] => 12/788126 [patent_app_country] => US [patent_app_date] => 2010-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4950 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0296/20110296153.pdf [firstpage_image] =>[orig_patent_app_number] => 12788126 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/788126
Optimization of storage device operating parameters May 25, 2010 Issued
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