Michael S. Chambers

Array ( [id] => 6731897 [patent_doc_number] => 20030188087 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-02 [patent_title] => 'Smart multi-functional compound memory' [patent_app_type] => new [patent_app_number] => 10/273688 [patent_app_country] => US [patent_app_date] => 2002-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1610 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0188/20030188087.pdf [firstpage_image] =>[orig_patent_app_number] => 10273688 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6822924 [patent_doc_number] => 20030221085 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-27 [patent_title] => 'Implementation of thread-static data in multi-threaded computer systems' [patent_app_type] => new [patent_app_number] => 10/273566 [patent_app_country] => US [patent_app_date] => 2002-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5839 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0221/20030221085.pdf [firstpage_image] =>[orig_patent_app_number] => 10273566 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1001685 [patent_doc_number] => 06912619 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-06-28 [patent_title] => 'Memory apparatus, data-processing apparatus, and data-processing method' [patent_app_type] => utility [patent_app_number] => 10/235153 [patent_app_country] => US [patent_app_date] => 2002-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8039 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/912/06912619.pdf [firstpage_image] =>[orig_patent_app_number] => 10235153 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1376984 [patent_doc_number] => 06578116 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-06-10 [patent_title] => 'Snoop blocking for cache coherency' [patent_app_type] => B2 [patent_app_number] => 10/215599 [patent_app_country] => US [patent_app_date] => 2002-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3302 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/578/06578116.pdf [firstpage_image] =>[orig_patent_app_number] => 10215599 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6703096 [patent_doc_number] => 20030225976 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-12-04 [patent_title] => 'Method and apparatus for multithreaded cache with simplified implementation of cache replacement policy' [patent_app_type] => new [patent_app_number] => 10/161874 [patent_app_country] => US [patent_app_date] => 2002-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5376 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0225/20030225976.pdf [firstpage_image] =>[orig_patent_app_number] => 10161874 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6703095 [patent_doc_number] => 20030225975 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-12-04 [patent_title] => 'Method and apparatus for multithreaded cache with cache eviction based on thread identifier' [patent_app_type] => new [patent_app_number] => 10/161774 [patent_app_country] => US [patent_app_date] => 2002-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5313 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0225/20030225975.pdf [firstpage_image] =>[orig_patent_app_number] => 10161774 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1200996 [patent_doc_number] => 06728851 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-04-27 [patent_title] => 'Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices' [patent_app_type] => B1 [patent_app_number] => 10/152969 [patent_app_country] => US [patent_app_date] => 2002-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 13632 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/728/06728851.pdf [firstpage_image] =>[orig_patent_app_number] => 10152969 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7308992 [patent_doc_number] => 20040117575 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-17 [patent_title] => 'System and method for controlling access to protected data stored in a storage unit' [patent_app_type] => new [patent_app_number] => 10/474018 [patent_app_country] => US [patent_app_date] => 2003-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6303 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 19 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0117/20040117575.pdf [firstpage_image] =>[orig_patent_app_number] => 10474018 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6831442 [patent_doc_number] => 20030182500 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-25 [patent_title] => 'Computer system with improved write cache and method therefor' [patent_app_type] => new [patent_app_number] => 10/105760 [patent_app_country] => US [patent_app_date] => 2002-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2926 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0182/20030182500.pdf [firstpage_image] =>[orig_patent_app_number] => 10105760 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6831467 [patent_doc_number] => 20030182525 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-25 [patent_title] => 'Method and system for migrating data' [patent_app_type] => new [patent_app_number] => 10/105821 [patent_app_country] => US [patent_app_date] => 2002-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6487 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0182/20030182525.pdf [firstpage_image] =>[orig_patent_app_number] => 10105821 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 706751 [patent_doc_number] => 07065627 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-20 [patent_title] => 'Method and system for providing an event driven image for a boot record' [patent_app_type] => utility [patent_app_number] => 10/105688 [patent_app_country] => US [patent_app_date] => 2002-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 5944 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/065/07065627.pdf [firstpage_image] =>[orig_patent_app_number] => 10105688 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6659608 [patent_doc_number] => 20030079079 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-24 [patent_title] => 'Method to control the operating speed of computer storage device' [patent_app_type] => new [patent_app_number] => 10/105648 [patent_app_country] => US [patent_app_date] => 2002-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1722 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0079/20030079079.pdf [firstpage_image] =>[orig_patent_app_number] => 10105648 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1119973 [patent_doc_number] => 06801979 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-10-05 [patent_title] => 'Method and apparatus for memory control circuit' [patent_app_type] => B1 [patent_app_number] => 10/077647 [patent_app_country] => US [patent_app_date] => 2002-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 3202 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 280 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/801/06801979.pdf [firstpage_image] =>[orig_patent_app_number] => 10077647 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1030578 [patent_doc_number] => 06883067 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-04-19 [patent_title] => 'Evaluation and optimization of code' [patent_app_type] => utility [patent_app_number] => 10/072814 [patent_app_country] => US [patent_app_date] => 2002-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2966 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/883/06883067.pdf [firstpage_image] =>[orig_patent_app_number] => 10072814 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1197001 [patent_doc_number] => 06732250 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-05-04 [patent_title] => 'Multiple address translations' [patent_app_type] => B2 [patent_app_number] => 10/071045 [patent_app_country] => US [patent_app_date] => 2002-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 18 [patent_no_of_words] => 10416 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/732/06732250.pdf [firstpage_image] =>[orig_patent_app_number] => 10071045 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6707611 [patent_doc_number] => 20030154345 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-14 [patent_title] => 'Multilevel cache system having unified cache tag memory' [patent_app_type] => new [patent_app_number] => 10/071069 [patent_app_country] => US [patent_app_date] => 2002-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4701 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0154/20030154345.pdf [firstpage_image] =>[orig_patent_app_number] => 10071069 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1055818 [patent_doc_number] => 06859868 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-22 [patent_title] => 'Object addressed memory hierarchy' [patent_app_type] => utility [patent_app_number] => 10/072169 [patent_app_country] => US [patent_app_date] => 2002-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3236 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/859/06859868.pdf [firstpage_image] =>[orig_patent_app_number] => 10072169 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6784440 [patent_doc_number] => 20030065888 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-03 [patent_title] => 'Data prefetch method for indirect references' [patent_app_type] => new [patent_app_number] => 10/067243 [patent_app_country] => US [patent_app_date] => 2002-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3361 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0065/20030065888.pdf [firstpage_image] =>[orig_patent_app_number] => 10067243 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6844498 [patent_doc_number] => 20030149845 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-07 [patent_title] => 'Dirty data protection for cache memories' [patent_app_type] => new [patent_app_number] => 10/071014 [patent_app_country] => US [patent_app_date] => 2002-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3992 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0149/20030149845.pdf [firstpage_image] =>[orig_patent_app_number] => 10071014 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6844482 [patent_doc_number] => 20030149829 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-07 [patent_title] => 'Implicit addressing sequential media drive with intervening converter simulating explicit addressing to host applications' [patent_app_type] => new [patent_app_number] => 10/071807 [patent_app_country] => US [patent_app_date] => 2002-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4404 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0149/20030149829.pdf [firstpage_image] =>[orig_patent_app_number] => 10071807 [rel_patent_id] =>[rel_patent_doc_number] =>)