Search

Michael Sun

Examiner (ID: 675, Phone: (571)270-1724 , Office: P/2184 )

Most Active Art Unit
2184
Art Unit(s)
2184, 2183
Total Applications
1018
Issued Applications
896
Pending Applications
48
Abandoned Applications
110

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20017767 [patent_doc_number] => 20250155989 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-15 [patent_title] => PHYSICAL BUTTON OPERATION METHOD AND HANDHELD ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 18/906140 [patent_app_country] => US [patent_app_date] => 2024-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18906140 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/906140
PHYSICAL BUTTON OPERATION METHOD AND HANDHELD ELECTRONIC DEVICE Oct 2, 2024 Pending
Array ( [id] => 20017767 [patent_doc_number] => 20250155989 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-15 [patent_title] => PHYSICAL BUTTON OPERATION METHOD AND HANDHELD ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 18/906140 [patent_app_country] => US [patent_app_date] => 2024-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18906140 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/906140
PHYSICAL BUTTON OPERATION METHOD AND HANDHELD ELECTRONIC DEVICE Oct 2, 2024 Pending
Array ( [id] => 20018025 [patent_doc_number] => 20250156247 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-15 [patent_title] => DATA PROCESSING METHOD, ELECTRONIC DEVICE AND COMPUTER-READABLE STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 18/800654 [patent_app_country] => US [patent_app_date] => 2024-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6977 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18800654 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/800654
DATA PROCESSING METHOD, ELECTRONIC DEVICE AND COMPUTER-READABLE STORAGE MEDIUM Aug 11, 2024 Pending
Array ( [id] => 20304081 [patent_doc_number] => 12450069 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-21 [patent_title] => NIC line-rate hardware packet processing [patent_app_type] => utility [patent_app_number] => 18/796511 [patent_app_country] => US [patent_app_date] => 2024-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 1188 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18796511 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/796511
NIC line-rate hardware packet processing Aug 6, 2024 Issued
Array ( [id] => 19558594 [patent_doc_number] => 20240370386 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-07 [patent_title] => MEMORY DEVICE SUPPORTING A HIGH-EFFICIENT INPUT/OUTPUT INTERFACE AND A MEMORY SYSTEM INCLUDING THE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/772354 [patent_app_country] => US [patent_app_date] => 2024-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18721 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18772354 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/772354
Memory device supporting a high-efficient input/output interface and a memory system including the memory device Jul 14, 2024 Issued
Array ( [id] => 19558593 [patent_doc_number] => 20240370385 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-07 [patent_title] => Computing System, Method, and Apparatus, and Acceleration Device [patent_app_type] => utility [patent_app_number] => 18/770092 [patent_app_country] => US [patent_app_date] => 2024-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13004 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18770092 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/770092
Computing System, Method, and Apparatus, and Acceleration Device Jul 10, 2024 Pending
Array ( [id] => 20317292 [patent_doc_number] => 12455843 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-28 [patent_title] => Data processing system and method [patent_app_type] => utility [patent_app_number] => 18/744042 [patent_app_country] => US [patent_app_date] => 2024-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 4710 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18744042 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/744042
Data processing system and method Jun 13, 2024 Issued
Array ( [id] => 20317292 [patent_doc_number] => 12455843 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-28 [patent_title] => Data processing system and method [patent_app_type] => utility [patent_app_number] => 18/744042 [patent_app_country] => US [patent_app_date] => 2024-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 4710 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18744042 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/744042
Data processing system and method Jun 13, 2024 Issued
Array ( [id] => 19466501 [patent_doc_number] => 20240320171 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => DATA CODING DEVICE, MEMORY CONTROLLER, AND STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 18/731350 [patent_app_country] => US [patent_app_date] => 2024-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17865 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18731350 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/731350
DATA CODING DEVICE, MEMORY CONTROLLER, AND STORAGE DEVICE Jun 2, 2024 Pending
Array ( [id] => 20415785 [patent_doc_number] => 12499071 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-16 [patent_title] => System decoder for training accelerators [patent_app_type] => utility [patent_app_number] => 18/680970 [patent_app_country] => US [patent_app_date] => 2024-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7948 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18680970 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/680970
System decoder for training accelerators May 30, 2024 Issued
Array ( [id] => 20415785 [patent_doc_number] => 12499071 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-16 [patent_title] => System decoder for training accelerators [patent_app_type] => utility [patent_app_number] => 18/680970 [patent_app_country] => US [patent_app_date] => 2024-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7948 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18680970 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/680970
System decoder for training accelerators May 30, 2024 Issued
Array ( [id] => 19626337 [patent_doc_number] => 12165173 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-10 [patent_title] => Methods and systems to monitor a media device via a USB port [patent_app_type] => utility [patent_app_number] => 18/672917 [patent_app_country] => US [patent_app_date] => 2024-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10994 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18672917 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/672917
Methods and systems to monitor a media device via a USB port May 22, 2024 Issued
Array ( [id] => 19466331 [patent_doc_number] => 20240320001 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => SYSTEMS, METHODS, AND APPPARATUS FOR MATRIX MOVE [patent_app_type] => utility [patent_app_number] => 18/663228 [patent_app_country] => US [patent_app_date] => 2024-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19496 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18663228 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/663228
SYSTEMS, METHODS, AND APPPARATUS FOR MATRIX MOVE May 13, 2024 Pending
Array ( [id] => 19451183 [patent_doc_number] => 20240311313 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => Method and Apparatus for Dual Issue Multiply Instructions [patent_app_type] => utility [patent_app_number] => 18/660120 [patent_app_country] => US [patent_app_date] => 2024-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 38671 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18660120 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/660120
Method and Apparatus for Dual Issue Multiply Instructions May 8, 2024 Pending
Array ( [id] => 19558611 [patent_doc_number] => 20240370403 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-07 [patent_title] => Systolic Memory Access [patent_app_type] => utility [patent_app_number] => 18/651461 [patent_app_country] => US [patent_app_date] => 2024-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12850 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18651461 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/651461
Systolic Memory Access Apr 29, 2024 Pending
Array ( [id] => 20234272 [patent_doc_number] => 20250291591 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-18 [patent_title] => METHOD AND APPARATUS FOR SUPPORTING DISTRIBUTED GRAPHICS AND COMPUTE ENGINES AND SYNCHRONIZATION IN MULTI-DIELET PARALLEL PROCESSOR ARCHITECTURES -- MEMORY BARRIERS [patent_app_type] => utility [patent_app_number] => 18/606960 [patent_app_country] => US [patent_app_date] => 2024-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10848 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18606960 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/606960
METHOD AND APPARATUS FOR SUPPORTING DISTRIBUTED GRAPHICS AND COMPUTE ENGINES AND SYNCHRONIZATION IN MULTI-DIELET PARALLEL PROCESSOR ARCHITECTURES -- MEMORY BARRIERS Mar 14, 2024 Pending
Array ( [id] => 20234272 [patent_doc_number] => 20250291591 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-18 [patent_title] => METHOD AND APPARATUS FOR SUPPORTING DISTRIBUTED GRAPHICS AND COMPUTE ENGINES AND SYNCHRONIZATION IN MULTI-DIELET PARALLEL PROCESSOR ARCHITECTURES -- MEMORY BARRIERS [patent_app_type] => utility [patent_app_number] => 18/606960 [patent_app_country] => US [patent_app_date] => 2024-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10848 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18606960 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/606960
METHOD AND APPARATUS FOR SUPPORTING DISTRIBUTED GRAPHICS AND COMPUTE ENGINES AND SYNCHRONIZATION IN MULTI-DIELET PARALLEL PROCESSOR ARCHITECTURES -- MEMORY BARRIERS Mar 14, 2024 Pending
Array ( [id] => 20203127 [patent_doc_number] => 12405906 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-02 [patent_title] => Combining read requests having spatial locality [patent_app_type] => utility [patent_app_number] => 18/598722 [patent_app_country] => US [patent_app_date] => 2024-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3819 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18598722 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/598722
Combining read requests having spatial locality Mar 6, 2024 Issued
Array ( [id] => 20228547 [patent_doc_number] => 12417199 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-16 [patent_title] => Semiconductor device and control method of the same [patent_app_type] => utility [patent_app_number] => 18/588277 [patent_app_country] => US [patent_app_date] => 2024-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 2399 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18588277 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/588277
Semiconductor device and control method of the same Feb 26, 2024 Issued
Array ( [id] => 20000802 [patent_doc_number] => 20250139024 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-01 [patent_title] => MEMORY SYSTEM AND A METHOD FOR TRANSMITTING DATA THROUGH A COMMAND ADDRESS BUS [patent_app_type] => utility [patent_app_number] => 18/582211 [patent_app_country] => US [patent_app_date] => 2024-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7111 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18582211 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/582211
MEMORY SYSTEM AND A METHOD FOR TRANSMITTING DATA THROUGH A COMMAND ADDRESS BUS Feb 19, 2024 Pending
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