Search

Michael Sun

Examiner (ID: 675, Phone: (571)270-1724 , Office: P/2184 )

Most Active Art Unit
2184
Art Unit(s)
2184, 2183
Total Applications
1018
Issued Applications
896
Pending Applications
48
Abandoned Applications
110

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18386226 [patent_doc_number] => 11657007 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-23 [patent_title] => Remote memory selection [patent_app_type] => utility [patent_app_number] => 17/333420 [patent_app_country] => US [patent_app_date] => 2021-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6152 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17333420 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/333420
Remote memory selection May 27, 2021 Issued
Array ( [id] => 18291289 [patent_doc_number] => 11620159 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-04 [patent_title] => Systems and methods for I/O command scheduling based on multiple resource parameters [patent_app_type] => utility [patent_app_number] => 17/333316 [patent_app_country] => US [patent_app_date] => 2021-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 9004 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17333316 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/333316
Systems and methods for I/O command scheduling based on multiple resource parameters May 27, 2021 Issued
Array ( [id] => 17690541 [patent_doc_number] => 20220197834 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-23 [patent_title] => DATA TRANSMISSION METHOD FOR CONVOLUTION OPERATION, FETCHER, AND CONVOLUTION OPERATION APPARATUS [patent_app_type] => utility [patent_app_number] => 17/330229 [patent_app_country] => US [patent_app_date] => 2021-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7171 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17330229 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/330229
Data transmission method for convolution operation, fetcher, and convolution operation apparatus May 24, 2021 Issued
Array ( [id] => 17550240 [patent_doc_number] => 20220121582 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-21 [patent_title] => MEMORY DEVICE SUPPORTING A HIGH-EFFICIENT INPUT/OUTPUT INTERFACE AND A MEMORY SYSTEM INCLUDING THE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/326513 [patent_app_country] => US [patent_app_date] => 2021-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18664 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17326513 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/326513
Memory device supporting a high-efficient input/output interface and a memory system including the memory device May 20, 2021 Issued
Array ( [id] => 17824597 [patent_doc_number] => 11429545 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-30 [patent_title] => Method and apparatus for data reads in host performance acceleration mode [patent_app_type] => utility [patent_app_number] => 17/324762 [patent_app_country] => US [patent_app_date] => 2021-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8414 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17324762 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/324762
Method and apparatus for data reads in host performance acceleration mode May 18, 2021 Issued
Array ( [id] => 17862318 [patent_doc_number] => 11443479 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-09-13 [patent_title] => Snapshot arbitration techniques for memory requests [patent_app_type] => utility [patent_app_number] => 17/324857 [patent_app_country] => US [patent_app_date] => 2021-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 9447 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17324857 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/324857
Snapshot arbitration techniques for memory requests May 18, 2021 Issued
Array ( [id] => 20130894 [patent_doc_number] => 12373207 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Implementing a micro-operation cache with compaction [patent_app_type] => utility [patent_app_number] => 17/325067 [patent_app_country] => US [patent_app_date] => 2021-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1158 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17325067 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/325067
Implementing a micro-operation cache with compaction May 18, 2021 Issued
Array ( [id] => 18136233 [patent_doc_number] => 11561912 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-24 [patent_title] => Host controller interface using multiple circular queue, and operating method thereof [patent_app_type] => utility [patent_app_number] => 17/321916 [patent_app_country] => US [patent_app_date] => 2021-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 28971 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17321916 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/321916
Host controller interface using multiple circular queue, and operating method thereof May 16, 2021 Issued
Array ( [id] => 18007123 [patent_doc_number] => 20220365889 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-17 [patent_title] => MEMORY WITH A COMMUNICATIONS BUS FOR DEVICE-TO-CONTROLLER COMMUNICATION, AND ASSOCIATED SYSTEMS, DEVICES, AND METHODS [patent_app_type] => utility [patent_app_number] => 17/318219 [patent_app_country] => US [patent_app_date] => 2021-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11654 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17318219 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/318219
Memory with a communications bus for device-to-controller communication, and associated systems, devices, and methods May 11, 2021 Issued
Array ( [id] => 17824496 [patent_doc_number] => 11429444 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-08-30 [patent_title] => Managing distribution of I/O queue pairs of a target among hosts [patent_app_type] => utility [patent_app_number] => 17/243945 [patent_app_country] => US [patent_app_date] => 2021-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 11396 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 244 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17243945 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/243945
Managing distribution of I/O queue pairs of a target among hosts Apr 28, 2021 Issued
Array ( [id] => 18356673 [patent_doc_number] => 11645073 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-09 [patent_title] => Address-based filtering for load/store speculation [patent_app_type] => utility [patent_app_number] => 17/238844 [patent_app_country] => US [patent_app_date] => 2021-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8539 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17238844 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/238844
Address-based filtering for load/store speculation Apr 22, 2021 Issued
Array ( [id] => 17276635 [patent_doc_number] => 20210382833 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-09 [patent_title] => SYSTEM, PROCESSING DEVICE, AND NON-TRANSITORY STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 17/233934 [patent_app_country] => US [patent_app_date] => 2021-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5449 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17233934 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/233934
System, processing device, and non-transitory storage medium Apr 18, 2021 Issued
Array ( [id] => 17915765 [patent_doc_number] => 20220318161 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-06 [patent_title] => MEMORY CONTROLLER POWER STATES [patent_app_type] => utility [patent_app_number] => 17/219273 [patent_app_country] => US [patent_app_date] => 2021-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7361 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17219273 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/219273
Memory controller power states Mar 30, 2021 Issued
Array ( [id] => 17715397 [patent_doc_number] => 11379388 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-07-05 [patent_title] => Credit scheme for multi-queue memory controllers [patent_app_type] => utility [patent_app_number] => 17/218650 [patent_app_country] => US [patent_app_date] => 2021-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6503 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17218650 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/218650
Credit scheme for multi-queue memory controllers Mar 30, 2021 Issued
Array ( [id] => 17899362 [patent_doc_number] => 20220309024 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => TOPOLOGIES AND ALGORITHMS FOR MULTI-PROCESSING UNIT INTERCONNECTED ACCELERATOR SYSTEMS [patent_app_type] => utility [patent_app_number] => 17/216024 [patent_app_country] => US [patent_app_date] => 2021-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4709 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17216024 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/216024
Topologies and algorithms for multi-processing unit interconnected accelerator systems Mar 28, 2021 Issued
Array ( [id] => 17900487 [patent_doc_number] => 20220310149 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => DATA CIRCUIT FOR A LOW SWING DATA BUS [patent_app_type] => utility [patent_app_number] => 17/214016 [patent_app_country] => US [patent_app_date] => 2021-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11983 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17214016 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/214016
Data circuit for a low swing data bus Mar 25, 2021 Issued
Array ( [id] => 17492165 [patent_doc_number] => 11281468 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-22 [patent_title] => Instruction execution method and instruction execution device [patent_app_type] => utility [patent_app_number] => 17/212194 [patent_app_country] => US [patent_app_date] => 2021-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 13048 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17212194 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/212194
Instruction execution method and instruction execution device Mar 24, 2021 Issued
Array ( [id] => 17715395 [patent_doc_number] => 11379386 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-05 [patent_title] => Mobile de-whitening [patent_app_type] => utility [patent_app_number] => 17/207885 [patent_app_country] => US [patent_app_date] => 2021-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 9096 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17207885 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/207885
Mobile de-whitening Mar 21, 2021 Issued
Array ( [id] => 16950233 [patent_doc_number] => 20210208925 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-08 [patent_title] => METHOD AND APPARATUS FOR EXECUTING NON-MASKABLE INTERRUPT [patent_app_type] => utility [patent_app_number] => 17/207186 [patent_app_country] => US [patent_app_date] => 2021-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8582 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17207186 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/207186
Method and apparatus for executing non-maskable interrupt Mar 18, 2021 Issued
Array ( [id] => 18087401 [patent_doc_number] => 11537537 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-27 [patent_title] => Semiconductor device and method [patent_app_type] => utility [patent_app_number] => 17/200427 [patent_app_country] => US [patent_app_date] => 2021-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 24 [patent_no_of_words] => 22718 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 272 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17200427 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/200427
Semiconductor device and method Mar 11, 2021 Issued
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