Search

Michael Sun

Examiner (ID: 1348, Phone: (571)270-1724 , Office: P/2184 )

Most Active Art Unit
2184
Art Unit(s)
2184, 2183
Total Applications
1016
Issued Applications
892
Pending Applications
48
Abandoned Applications
110

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17260907 [patent_doc_number] => 20210373892 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-02 [patent_title] => TASK GRAPH GENERATION FOR WORKLOAD PROCESSING [patent_app_type] => utility [patent_app_number] => 16/888521 [patent_app_country] => US [patent_app_date] => 2020-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8858 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16888521 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/888521
Task graph generation for workload processing May 28, 2020 Issued
Array ( [id] => 16314700 [patent_doc_number] => 20200293438 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-17 [patent_title] => SYSTEMS AND METHODS FOR MEMORY SYSTEM MANAGEMENT [patent_app_type] => utility [patent_app_number] => 16/886252 [patent_app_country] => US [patent_app_date] => 2020-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7352 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16886252 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/886252
Systems and methods for memory system management May 27, 2020 Issued
Array ( [id] => 16470249 [patent_doc_number] => 20200371786 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-26 [patent_title] => Method and Apparatus for Dual Issue Multiply Instructions [patent_app_type] => utility [patent_app_number] => 16/878608 [patent_app_country] => US [patent_app_date] => 2020-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 38477 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16878608 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/878608
Method and apparatus for dual issue multiply instructions May 19, 2020 Issued
Array ( [id] => 17492273 [patent_doc_number] => 11281576 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-22 [patent_title] => Memory device [patent_app_type] => utility [patent_app_number] => 16/878962 [patent_app_country] => US [patent_app_date] => 2020-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5691 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 317 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16878962 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/878962
Memory device May 19, 2020 Issued
Array ( [id] => 17223449 [patent_doc_number] => 11175950 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-11-16 [patent_title] => Dynamic regulation of parallelism for job scheduling [patent_app_type] => utility [patent_app_number] => 16/877269 [patent_app_country] => US [patent_app_date] => 2020-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9715 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 274 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16877269 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/877269
Dynamic regulation of parallelism for job scheduling May 17, 2020 Issued
Array ( [id] => 17530965 [patent_doc_number] => 11303684 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-12 [patent_title] => Methods and systems for data transmission [patent_app_type] => utility [patent_app_number] => 16/864614 [patent_app_country] => US [patent_app_date] => 2020-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 34 [patent_no_of_words] => 19121 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16864614 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/864614
Methods and systems for data transmission Apr 30, 2020 Issued
Array ( [id] => 17379980 [patent_doc_number] => 11237996 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-01 [patent_title] => Virtualization of a reconfigurable data processor [patent_app_type] => utility [patent_app_number] => 16/862445 [patent_app_country] => US [patent_app_date] => 2020-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 24 [patent_no_of_words] => 19559 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16862445 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/862445
Virtualization of a reconfigurable data processor Apr 28, 2020 Issued
Array ( [id] => 16486330 [patent_doc_number] => 20200379936 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-03 [patent_title] => RECONFIGURABLE CHANNEL INTERFACES FOR MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 16/858286 [patent_app_country] => US [patent_app_date] => 2020-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22009 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -30 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16858286 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/858286
Reconfigurable channel interfaces for memory devices Apr 23, 2020 Issued
Array ( [id] => 16957983 [patent_doc_number] => 11061848 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-07-13 [patent_title] => Information processing apparatus and control method [patent_app_type] => utility [patent_app_number] => 16/856330 [patent_app_country] => US [patent_app_date] => 2020-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7401 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16856330 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/856330
Information processing apparatus and control method Apr 22, 2020 Issued
Array ( [id] => 17091588 [patent_doc_number] => 11119777 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-09-14 [patent_title] => Extended prefix including routing bit for extended instruction format [patent_app_type] => utility [patent_app_number] => 16/854964 [patent_app_country] => US [patent_app_date] => 2020-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7439 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16854964 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/854964
Extended prefix including routing bit for extended instruction format Apr 21, 2020 Issued
Array ( [id] => 18918036 [patent_doc_number] => 11880315 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-23 [patent_title] => Operation of an output component to produce a representation of an instruction set [patent_app_type] => utility [patent_app_number] => 17/914472 [patent_app_country] => US [patent_app_date] => 2020-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 8653 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17914472 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/914472
Operation of an output component to produce a representation of an instruction set Apr 14, 2020 Issued
Array ( [id] => 18934440 [patent_doc_number] => 11886874 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-30 [patent_title] => Arithmetic operation device and arithmetic operation method [patent_app_type] => utility [patent_app_number] => 17/610251 [patent_app_country] => US [patent_app_date] => 2020-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8343 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17610251 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/610251
Arithmetic operation device and arithmetic operation method Apr 7, 2020 Issued
Array ( [id] => 17001404 [patent_doc_number] => 11080215 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-08-03 [patent_title] => Host device providing automated prediction of change intervals to reduce adverse impacts on applications [patent_app_type] => utility [patent_app_number] => 16/836147 [patent_app_country] => US [patent_app_date] => 2020-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 13513 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16836147 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/836147
Host device providing automated prediction of change intervals to reduce adverse impacts on applications Mar 30, 2020 Issued
Array ( [id] => 16864648 [patent_doc_number] => 11023390 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-06-01 [patent_title] => Resizing circuitry [patent_app_type] => utility [patent_app_number] => 16/831975 [patent_app_country] => US [patent_app_date] => 2020-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 17054 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16831975 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/831975
Resizing circuitry Mar 26, 2020 Issued
Array ( [id] => 16486160 [patent_doc_number] => 20200379765 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-03 [patent_title] => MULTIPROCESSOR UTILITY METER FEATURING A METROLOGY PROCESSOR COUPLED TO AN APPLICATION PROCESSOR [patent_app_type] => utility [patent_app_number] => 16/829456 [patent_app_country] => US [patent_app_date] => 2020-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9024 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16829456 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/829456
Multiprocessor utility meter featuring a metrology processor coupled to an application processor Mar 24, 2020 Issued
Array ( [id] => 16314727 [patent_doc_number] => 20200293465 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-17 [patent_title] => MULTI-PROTOCOL SUPPORT FOR TRANSACTIONS [patent_app_type] => utility [patent_app_number] => 16/827460 [patent_app_country] => US [patent_app_date] => 2020-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10937 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16827460 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/827460
Multi-protocol support for transactions Mar 22, 2020 Issued
Array ( [id] => 17001409 [patent_doc_number] => 11080220 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-03 [patent_title] => System on chip having semaphore function and method for implementing semaphore function [patent_app_type] => utility [patent_app_number] => 16/821289 [patent_app_country] => US [patent_app_date] => 2020-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 12287 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16821289 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/821289
System on chip having semaphore function and method for implementing semaphore function Mar 16, 2020 Issued
Array ( [id] => 16346344 [patent_doc_number] => 20200310995 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-01 [patent_title] => WRITING MESSAGES IN A SHARED MEMORY ARCHITECTURE FOR A VEHICLE [patent_app_type] => utility [patent_app_number] => 16/798129 [patent_app_country] => US [patent_app_date] => 2020-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21746 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16798129 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/798129
Writing messages in a shared memory architecture for a vehicle Feb 20, 2020 Issued
Array ( [id] => 17613924 [patent_doc_number] => 20220156204 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-19 [patent_title] => QUAD-CHANNEL DRAM [patent_app_type] => utility [patent_app_number] => 17/433071 [patent_app_country] => US [patent_app_date] => 2020-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9835 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17433071 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/433071
Quad-channel DRAM Feb 17, 2020 Issued
Array ( [id] => 16240325 [patent_doc_number] => 20200257559 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-13 [patent_title] => CONTROLLING DEVICES [patent_app_type] => utility [patent_app_number] => 16/787485 [patent_app_country] => US [patent_app_date] => 2020-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10677 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16787485 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/787485
Controlling devices Feb 10, 2020 Issued
Menu