Michael Sun

Array ( [id] => 16171485 [patent_doc_number] => 10713052 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-14 [patent_title] => Prefetcher for delinquent irregular loads [patent_app_type] => utility [patent_app_number] => 16/021974 [patent_app_country] => US [patent_app_date] => 2018-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 32 [patent_no_of_words] => 20047 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16021974 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15198183 [patent_doc_number] => 10496587 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-12-03 [patent_title] => Wide programmable gain receiver data path for single-ended memory interface application [patent_app_type] => utility [patent_app_number] => 16/020086 [patent_app_country] => US [patent_app_date] => 2018-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 12248 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16020086 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14298949 [patent_doc_number] => 10289601 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-05-14 [patent_title] => Host controller, secure element and serial peripheral interface communications system [patent_app_type] => utility [patent_app_number] => 16/018334 [patent_app_country] => US [patent_app_date] => 2018-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 6370 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16018334 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13797503 [patent_doc_number] => 20190012290 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-10 [patent_title] => DATA TRANSFER DEVICE, DATA TRANSFER METHOD, AND A NON-TRANSITORY RECORDING MEDIUM [patent_app_type] => utility [patent_app_number] => 16/018786 [patent_app_country] => US [patent_app_date] => 2018-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7811 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16018786 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13797501 [patent_doc_number] => 20190012289 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-10 [patent_title] => CONTROL METHOD FOR TRANSMISSION AND RECEPTION SYSTEM, TRANSMITTING APPARATUS, AND RECEIVING APPARATUS [patent_app_type] => utility [patent_app_number] => 16/017443 [patent_app_country] => US [patent_app_date] => 2018-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8272 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16017443 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16551798 [patent_doc_number] => 10884958 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-05 [patent_title] => DIMM for a high bandwidth memory channel [patent_app_type] => utility [patent_app_number] => 16/017515 [patent_app_country] => US [patent_app_date] => 2018-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5949 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16017515 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13906589 [patent_doc_number] => 20190042499 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-07 [patent_title] => HIGH BANDWIDTH DIMM [patent_app_type] => utility [patent_app_number] => 16/017430 [patent_app_country] => US [patent_app_date] => 2018-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5116 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16017430 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14149675 [patent_doc_number] => 10255218 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-04-09 [patent_title] => Systems and methods for maintaining specific ordering in bus traffic [patent_app_type] => utility [patent_app_number] => 16/017198 [patent_app_country] => US [patent_app_date] => 2018-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8928 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16017198 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15297359 [patent_doc_number] => 20190391815 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-26 [patent_title] => INSTRUCTION AGE MATRIX AND LOGIC FOR QUEUES IN A PROCESSOR [patent_app_type] => utility [patent_app_number] => 16/014338 [patent_app_country] => US [patent_app_date] => 2018-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13581 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16014338 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13432607 [patent_doc_number] => 20180267846 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-20 [patent_title] => Processing System With Interspersed Processors With Multi-Layer Interconnection [patent_app_type] => utility [patent_app_number] => 15/986701 [patent_app_country] => US [patent_app_date] => 2018-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19817 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15986701 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14825473 [patent_doc_number] => 10409746 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-10 [patent_title] => Memory access control device and control method of memory access [patent_app_type] => utility [patent_app_number] => 15/964250 [patent_app_country] => US [patent_app_date] => 2018-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 4358 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15964250 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15043119 [patent_doc_number] => 20190332564 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-31 [patent_title] => ACCELERATOR MANAGEMENT [patent_app_type] => utility [patent_app_number] => 15/964115 [patent_app_country] => US [patent_app_date] => 2018-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11299 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15964115 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15043099 [patent_doc_number] => 20190332554 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-31 [patent_title] => TIME DEPENDENT SERVICE LEVEL OBJECTIVES [patent_app_type] => utility [patent_app_number] => 15/963398 [patent_app_country] => US [patent_app_date] => 2018-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12278 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15963398 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15043105 [patent_doc_number] => 20190332557 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-31 [patent_title] => FLEXIBLE I/O SLOT CONNECTIONS [patent_app_type] => utility [patent_app_number] => 15/963420 [patent_app_country] => US [patent_app_date] => 2018-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10433 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15963420 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13526247 [patent_doc_number] => 20180314666 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-01 [patent_title] => STORAGE SYSTEM [patent_app_type] => utility [patent_app_number] => 15/959675 [patent_app_country] => US [patent_app_date] => 2018-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 33078 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15959675 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13376371 [patent_doc_number] => 20180239727 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-23 [patent_title] => Secure Access to Peripheral Devices Over a Bus [patent_app_type] => utility [patent_app_number] => 15/955715 [patent_app_country] => US [patent_app_date] => 2018-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7434 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -30 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15955715 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13347207 [patent_doc_number] => 20180225143 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-09 [patent_title] => METHOD AND APPARATUS FOR EXECUTING NON-MASKABLE INTERRUPT [patent_app_type] => utility [patent_app_number] => 15/947491 [patent_app_country] => US [patent_app_date] => 2018-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8602 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15947491 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13347151 [patent_doc_number] => 20180225115 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-09 [patent_title] => SIGNAL PROCESSING CIRCUIT [patent_app_type] => utility [patent_app_number] => 15/943063 [patent_app_country] => US [patent_app_date] => 2018-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13335 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15943063 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17121194 [patent_doc_number] => 11132329 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-28 [patent_title] => Electronic control device and method of controlling logic circuit [patent_app_type] => utility [patent_app_number] => 16/606830 [patent_app_country] => US [patent_app_date] => 2018-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 13494 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16606830 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17364906 [patent_doc_number] => 11231927 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-25 [patent_title] => System, apparatus and method for providing a fabric for an accelerator [patent_app_type] => utility [patent_app_number] => 15/915476 [patent_app_country] => US [patent_app_date] => 2018-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8194 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15915476 [rel_patent_id] =>[rel_patent_doc_number] =>)