Search

Michael Sun

Examiner (ID: 11045, Phone: (571)270-1724 , Office: P/2184 )

Most Active Art Unit
2184
Art Unit(s)
2184, 2183
Total Applications
1032
Issued Applications
904
Pending Applications
48
Abandoned Applications
110

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15231901 [patent_doc_number] => 10503673 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-10 [patent_title] => Storage system and method of storage system for constructing system [patent_app_type] => utility [patent_app_number] => 16/083067 [patent_app_country] => US [patent_app_date] => 2016-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 6466 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 292 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16083067 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/083067
Storage system and method of storage system for constructing system Sep 12, 2016 Issued
Array ( [id] => 11338607 [patent_doc_number] => 20160364361 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-15 [patent_title] => 'ACCESS AND PROTECTION OF I2C INTERFACES' [patent_app_type] => utility [patent_app_number] => 15/254064 [patent_app_country] => US [patent_app_date] => 2016-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5089 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15254064 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/254064
Access and protection of I2C interfaces Aug 31, 2016 Issued
Array ( [id] => 11996288 [patent_doc_number] => 20170300443 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-19 [patent_title] => 'SYSTEMS, APPARATUS, AND METHODS FOR EFFICIENT SPACE TO TIME CONVERSION OF OTU MULTIPLEXED SIGNAL' [patent_app_type] => utility [patent_app_number] => 15/249341 [patent_app_country] => US [patent_app_date] => 2016-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 11099 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15249341 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/249341
Systems, apparatus, and methods for efficient space to time conversion of OTU multiplexed signal Aug 25, 2016 Issued
Array ( [id] => 11474013 [patent_doc_number] => 20170060796 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-02 [patent_title] => 'METHOD OF SCHEDULING SYSTEM-ON-CHIP INCLUDING REAL-TIME SHARED INTERFACE' [patent_app_type] => utility [patent_app_number] => 15/247366 [patent_app_country] => US [patent_app_date] => 2016-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8597 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15247366 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/247366
Method of scheduling system-on-chip including real-time shared interface Aug 24, 2016 Issued
Array ( [id] => 13281471 [patent_doc_number] => 10152320 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-11 [patent_title] => Method of transferring data between external devices and an array processor [patent_app_type] => utility [patent_app_number] => 15/225638 [patent_app_country] => US [patent_app_date] => 2016-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 59 [patent_no_of_words] => 28462 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15225638 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/225638
Method of transferring data between external devices and an array processor Jul 31, 2016 Issued
Array ( [id] => 11816917 [patent_doc_number] => 09720867 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-01 [patent_title] => 'Processing system with interspersed processors with multi-layer interconnection' [patent_app_type] => utility [patent_app_number] => 15/219095 [patent_app_country] => US [patent_app_date] => 2016-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 20126 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15219095 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/219095
Processing system with interspersed processors with multi-layer interconnection Jul 24, 2016 Issued
Array ( [id] => 16950363 [patent_doc_number] => 20210209055 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-08 [patent_title] => Parallel, Distributed Processing in a Heterogeneous, Distributed Environment [patent_app_type] => utility [patent_app_number] => 16/075451 [patent_app_country] => US [patent_app_date] => 2016-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8360 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16075451 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/075451
Parallel, distributed processing in a heterogeneous, distributed environment Jun 22, 2016 Issued
Array ( [id] => 11102791 [patent_doc_number] => 20160299761 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-13 [patent_title] => 'COMMON ARCHITECTURAL STATE PRESENTATION FOR PROCESSOR HAVING PROCESSING CORES OF DIFFERENT TYPES' [patent_app_type] => utility [patent_app_number] => 15/181374 [patent_app_country] => US [patent_app_date] => 2016-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 4339 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15181374 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/181374
Common architectural state presentation for processor having processing cores of different types Jun 12, 2016 Issued
Array ( [id] => 13185983 [patent_doc_number] => 10108511 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-23 [patent_title] => Test for 50 nanosecond spike filter [patent_app_type] => utility [patent_app_number] => 15/179470 [patent_app_country] => US [patent_app_date] => 2016-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10680 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15179470 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/179470
Test for 50 nanosecond spike filter Jun 9, 2016 Issued
Array ( [id] => 13976781 [patent_doc_number] => 10217758 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-26 [patent_title] => Electronic device and method for fabricating the same [patent_app_type] => utility [patent_app_number] => 15/179220 [patent_app_country] => US [patent_app_date] => 2016-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 29 [patent_no_of_words] => 15659 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15179220 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/179220
Electronic device and method for fabricating the same Jun 9, 2016 Issued
Array ( [id] => 14123501 [patent_doc_number] => 10248610 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-02 [patent_title] => Enforcing transaction order in peer-to-peer interactions [patent_app_type] => utility [patent_app_number] => 15/177348 [patent_app_country] => US [patent_app_date] => 2016-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4017 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15177348 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/177348
Enforcing transaction order in peer-to-peer interactions Jun 8, 2016 Issued
Array ( [id] => 11731475 [patent_doc_number] => 20170192918 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-06 [patent_title] => 'SYSTEM COMPRISING A MASTER DEVICE AND A SLAVE DEVICE HAVING MULTIPLE INTEGRATED CIRCUIT DIE, WIRELESS COMMUNICATION UNIT AND METHOD THEREFOR' [patent_app_type] => utility [patent_app_number] => 15/177557 [patent_app_country] => US [patent_app_date] => 2016-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6359 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15177557 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/177557
System comprising a master device and a slave device having multiple integrated circuit die, wireless communication unit and method therefor Jun 8, 2016 Issued
Array ( [id] => 11070029 [patent_doc_number] => 20160266993 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-15 [patent_title] => 'VALIDATING CONNECTION, STRUCTURAL CHARACTERISTICS AND POSITIONING OF CABLE CONNECTORS' [patent_app_type] => utility [patent_app_number] => 15/159975 [patent_app_country] => US [patent_app_date] => 2016-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9698 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15159975 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/159975
Validating connection, structural characteristics and positioning of cable connectors May 19, 2016 Issued
Array ( [id] => 11064696 [patent_doc_number] => 20160261660 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-08 [patent_title] => 'METHODS AND SYSTEMS FOR DATA TRANSMISSION' [patent_app_type] => utility [patent_app_number] => 15/156003 [patent_app_country] => US [patent_app_date] => 2016-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 19583 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15156003 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/156003
Methods and systems for data transmission May 15, 2016 Issued
Array ( [id] => 11897076 [patent_doc_number] => 09767012 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-19 [patent_title] => 'Systems and methods for memory system management based on thermal information of a memory system' [patent_app_type] => utility [patent_app_number] => 15/156022 [patent_app_country] => US [patent_app_date] => 2016-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7441 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15156022 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/156022
Systems and methods for memory system management based on thermal information of a memory system May 15, 2016 Issued
Array ( [id] => 11245282 [patent_doc_number] => 09471324 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-10-18 [patent_title] => 'Concurrent execution of heterogeneous vector instructions' [patent_app_type] => utility [patent_app_number] => 15/154381 [patent_app_country] => US [patent_app_date] => 2016-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 11399 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15154381 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/154381
Concurrent execution of heterogeneous vector instructions May 12, 2016 Issued
Array ( [id] => 12551499 [patent_doc_number] => 10013382 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-03 [patent_title] => Smart plug node management [patent_app_type] => utility [patent_app_number] => 15/140220 [patent_app_country] => US [patent_app_date] => 2016-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5290 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15140220 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/140220
Smart plug node management Apr 26, 2016 Issued
Array ( [id] => 13185805 [patent_doc_number] => 10108422 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-23 [patent_title] => Multi-thread network stack buffering of data frames [patent_app_type] => utility [patent_app_number] => 15/139596 [patent_app_country] => US [patent_app_date] => 2016-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6386 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15139596 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/139596
Multi-thread network stack buffering of data frames Apr 26, 2016 Issued
Array ( [id] => 14265539 [patent_doc_number] => 10282333 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-07 [patent_title] => Electronic device operating method and electronic device for supporting the same [patent_app_type] => utility [patent_app_number] => 15/139760 [patent_app_country] => US [patent_app_date] => 2016-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 20648 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15139760 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/139760
Electronic device operating method and electronic device for supporting the same Apr 26, 2016 Issued
Array ( [id] => 11124226 [patent_doc_number] => 20160321200 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-03 [patent_title] => 'ENHANCED INITIALIZATION FOR DATA STORAGE ASSEMBLIES' [patent_app_type] => utility [patent_app_number] => 15/139609 [patent_app_country] => US [patent_app_date] => 2016-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9087 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15139609 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/139609
Enhanced initialization for data storage assemblies Apr 26, 2016 Issued
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