Michael Sun

Array ( [id] => 11095155 [patent_doc_number] => 20160292124 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-06 [patent_title] => 'COMPUTER MOUNTING MULTIPLE MODULES FACILITATING OPENING/EXPANSION CONTROL PROCESS WITH CONNECTORS' [patent_app_type] => utility [patent_app_number] => 15/076994 [patent_app_country] => US [patent_app_date] => 2016-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6117 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15076994 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11095152 [patent_doc_number] => 20160292120 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-06 [patent_title] => 'SEMICONDUCTOR DEVICE AND CONTROL METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 15/076422 [patent_app_country] => US [patent_app_date] => 2016-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 11223 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15076422 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13158327 [patent_doc_number] => 10095891 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-09 [patent_title] => Secure access to peripheral devices over a bus [patent_app_type] => utility [patent_app_number] => 15/075219 [patent_app_country] => US [patent_app_date] => 2016-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 4354 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15075219 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13083295 [patent_doc_number] => 10061714 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-28 [patent_title] => Tuple encoding aware direct memory access engine for scratchpad enabled multicore processors [patent_app_type] => utility [patent_app_number] => 15/073905 [patent_app_country] => US [patent_app_date] => 2016-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 20463 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15073905 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13069157 [patent_doc_number] => 10055358 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-21 [patent_title] => Run length encoding aware direct memory access filtering engine for scratchpad enabled multicore processors [patent_app_type] => utility [patent_app_number] => 15/074248 [patent_app_country] => US [patent_app_date] => 2016-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 20496 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 322 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15074248 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12114169 [patent_doc_number] => 09870162 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-16 [patent_title] => 'Method to virtualize PCIe controllers to support boot/hibernation/crash-dump from a spanned virtual disk' [patent_app_type] => utility [patent_app_number] => 15/074452 [patent_app_country] => US [patent_app_date] => 2016-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6962 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15074452 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10999277 [patent_doc_number] => 20160196224 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-07 [patent_title] => 'HYBRID MEMORY BLADE' [patent_app_type] => utility [patent_app_number] => 15/073947 [patent_app_country] => US [patent_app_date] => 2016-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 5304 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15073947 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14235399 [patent_doc_number] => 20190129872 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-02 [patent_title] => Method For Establishing Connection Between Devices Having Universal Serial Bus USB Type-C Interfaces, And Terminal Device [patent_app_type] => utility [patent_app_number] => 16/083602 [patent_app_country] => US [patent_app_date] => 2016-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15704 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16083602 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11027546 [patent_doc_number] => 20160224503 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-04 [patent_title] => 'ADAPTIVE, PREDICATIVE, AND INTELLIGENT SCANNING OF ITEMS IN A PHYSICAL LAYER MANAGEMENT SYSTEM' [patent_app_type] => utility [patent_app_number] => 15/014206 [patent_app_country] => US [patent_app_date] => 2016-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 10260 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15014206 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11027533 [patent_doc_number] => 20160224489 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-04 [patent_title] => 'VOLTAGE MODE AND CURRENT MODE DEVICE ENUMERATION' [patent_app_type] => utility [patent_app_number] => 15/014385 [patent_app_country] => US [patent_app_date] => 2016-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7966 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15014385 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11838774 [patent_doc_number] => 20170220494 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-03 [patent_title] => 'INLINE CRYPTOGRAPHIC ENGINE (ICE) FOR PERIPHERAL COMPONENT INTERCONNECT EXPRESS (PCIe) SYSTEMS' [patent_app_type] => utility [patent_app_number] => 15/014158 [patent_app_country] => US [patent_app_date] => 2016-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6649 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15014158 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12513903 [patent_doc_number] => 10002100 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-06-19 [patent_title] => Active-by-active programmable device [patent_app_type] => utility [patent_app_number] => 15/013696 [patent_app_country] => US [patent_app_date] => 2016-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 22 [patent_no_of_words] => 10602 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15013696 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11838789 [patent_doc_number] => 20170220508 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-03 [patent_title] => 'SYSTEM-LEVEL INTERCONNECT RING FOR A PROGRAMMABLE INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 15/013690 [patent_app_country] => US [patent_app_date] => 2016-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 10980 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15013690 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13041317 [patent_doc_number] => 10042794 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-07 [patent_title] => Methods and apparatus for synchronizing uplink and downlink transactions on an inter-device communication link [patent_app_type] => utility [patent_app_number] => 15/011291 [patent_app_country] => US [patent_app_date] => 2016-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8533 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15011291 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11838769 [patent_doc_number] => 20170220489 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-03 [patent_title] => 'DYNAMIC CONTAINERIZED SYSTEM MEMORY PROTECTION FOR LOW-ENERGY MCUS' [patent_app_type] => utility [patent_app_number] => 15/008650 [patent_app_country] => US [patent_app_date] => 2016-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7568 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15008650 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13281721 [patent_doc_number] => 10152445 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-11 [patent_title] => Signal count reduction between semiconductor dies assembled in wafer-level package [patent_app_type] => utility [patent_app_number] => 15/009819 [patent_app_country] => US [patent_app_date] => 2016-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5486 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15009819 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10793923 [patent_doc_number] => 20160140080 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-19 [patent_title] => 'COMPUTER ARCHITECTURE WITH A HARDWARE ACCUMULATOR RESET' [patent_app_type] => utility [patent_app_number] => 15/002718 [patent_app_country] => US [patent_app_date] => 2016-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6855 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15002718 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13041085 [patent_doc_number] => 10042678 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-07 [patent_title] => Lock management method and system, method and apparatus for configuring lock management system [patent_app_type] => utility [patent_app_number] => 14/995789 [patent_app_country] => US [patent_app_date] => 2016-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 11024 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14995789 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13004145 [patent_doc_number] => 10025741 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-17 [patent_title] => System-on-chip, mobile terminal, and method for operating the system-on-chip [patent_app_type] => utility [patent_app_number] => 14/995179 [patent_app_country] => US [patent_app_date] => 2016-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 10144 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14995179 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12393504 [patent_doc_number] => 09965417 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-05-08 [patent_title] => Use of interrupt memory for communication via PCIe communication fabric [patent_app_type] => utility [patent_app_number] => 14/995124 [patent_app_country] => US [patent_app_date] => 2016-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5379 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14995124 [rel_patent_id] =>[rel_patent_doc_number] =>)