Search

Michael Sun

Examiner (ID: 675, Phone: (571)270-1724 , Office: P/2184 )

Most Active Art Unit
2184
Art Unit(s)
2184, 2183
Total Applications
1018
Issued Applications
896
Pending Applications
48
Abandoned Applications
110

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10793923 [patent_doc_number] => 20160140080 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-19 [patent_title] => 'COMPUTER ARCHITECTURE WITH A HARDWARE ACCUMULATOR RESET' [patent_app_type] => utility [patent_app_number] => 15/002718 [patent_app_country] => US [patent_app_date] => 2016-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6855 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15002718 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/002718
Computer architecture with a hardware accumulator reset Jan 20, 2016 Issued
Array ( [id] => 13041085 [patent_doc_number] => 10042678 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-07 [patent_title] => Lock management method and system, method and apparatus for configuring lock management system [patent_app_type] => utility [patent_app_number] => 14/995789 [patent_app_country] => US [patent_app_date] => 2016-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 11024 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14995789 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/995789
Lock management method and system, method and apparatus for configuring lock management system Jan 13, 2016 Issued
Array ( [id] => 13004145 [patent_doc_number] => 10025741 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-17 [patent_title] => System-on-chip, mobile terminal, and method for operating the system-on-chip [patent_app_type] => utility [patent_app_number] => 14/995179 [patent_app_country] => US [patent_app_date] => 2016-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 10144 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14995179 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/995179
System-on-chip, mobile terminal, and method for operating the system-on-chip Jan 12, 2016 Issued
Array ( [id] => 12393504 [patent_doc_number] => 09965417 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-05-08 [patent_title] => Use of interrupt memory for communication via PCIe communication fabric [patent_app_type] => utility [patent_app_number] => 14/995124 [patent_app_country] => US [patent_app_date] => 2016-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5379 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14995124 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/995124
Use of interrupt memory for communication via PCIe communication fabric Jan 12, 2016 Issued
Array ( [id] => 11523400 [patent_doc_number] => 09606798 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-28 [patent_title] => 'VLIW processor, instruction structure, and instruction execution method' [patent_app_type] => utility [patent_app_number] => 14/989647 [patent_app_country] => US [patent_app_date] => 2016-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 8866 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14989647 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/989647
VLIW processor, instruction structure, and instruction execution method Jan 5, 2016 Issued
Array ( [id] => 11708685 [patent_doc_number] => 20170177184 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-22 [patent_title] => 'RECONFIGURABLE COMPUTING DEVICE USER INTERFACE' [patent_app_type] => utility [patent_app_number] => 14/977934 [patent_app_country] => US [patent_app_date] => 2015-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4348 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14977934 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/977934
Reconfigurable computing device user interface Dec 21, 2015 Issued
Array ( [id] => 12556899 [patent_doc_number] => 10015200 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-03 [patent_title] => Communication with accessories [patent_app_type] => utility [patent_app_number] => 14/975657 [patent_app_country] => US [patent_app_date] => 2015-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 18105 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14975657 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/975657
Communication with accessories Dec 17, 2015 Issued
Array ( [id] => 10816272 [patent_doc_number] => 20160162433 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-09 [patent_title] => 'IO-LINK ADAPTER' [patent_app_type] => utility [patent_app_number] => 14/960743 [patent_app_country] => US [patent_app_date] => 2015-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1421 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14960743 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/960743
IO-Link adapter Dec 6, 2015 Issued
Array ( [id] => 11672500 [patent_doc_number] => 20170161222 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-08 [patent_title] => 'METHOD TO ENABLE INTEL MINI-MEZZ OPEN COMPUTE PROJECT (OCP) PLUG-AND-PLAY NETWORK PHY CARDS' [patent_app_type] => utility [patent_app_number] => 14/961010 [patent_app_country] => US [patent_app_date] => 2015-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7478 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14961010 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/961010
Method to enable intel mini-mezz open compute project (OCP) plug-and-play network phy cards Dec 6, 2015 Issued
Array ( [id] => 11509124 [patent_doc_number] => 09600284 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-21 [patent_title] => 'Computer program instruction analysis' [patent_app_type] => utility [patent_app_number] => 14/929861 [patent_app_country] => US [patent_app_date] => 2015-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3497 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14929861 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/929861
Computer program instruction analysis Nov 1, 2015 Issued
Array ( [id] => 10603146 [patent_doc_number] => 09323712 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-26 [patent_title] => 'Hybrid memory blade' [patent_app_type] => utility [patent_app_number] => 14/878680 [patent_app_country] => US [patent_app_date] => 2015-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5276 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14878680 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/878680
Hybrid memory blade Oct 7, 2015 Issued
Array ( [id] => 10680441 [patent_doc_number] => 20160026585 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-28 [patent_title] => 'VALIDATING CONNECTION, STRUCTURAL CHARACTERISTICS AND POSITIONING OF CABLE CONNECTORS' [patent_app_type] => utility [patent_app_number] => 14/877397 [patent_app_country] => US [patent_app_date] => 2015-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9702 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14877397 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/877397
Validating connection, structural characteristics and positioning of cable connectors Oct 6, 2015 Issued
Array ( [id] => 13679613 [patent_doc_number] => 20160378543 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-29 [patent_title] => IMPLEMENTING PSEUDO NON-MASKING INTERRUPTS BEHAVIOR USING A PRIORITY INTERRUPT CONTROLLER [patent_app_type] => utility [patent_app_number] => 14/876831 [patent_app_country] => US [patent_app_date] => 2015-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5008 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14876831 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/876831
Implementing pseudo non-masking interrupts behavior using a priority interrupt controller Oct 6, 2015 Issued
Array ( [id] => 12311697 [patent_doc_number] => 09940278 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-10 [patent_title] => System on chip having semaphore function and method for implementing semaphore function [patent_app_type] => utility [patent_app_number] => 14/877653 [patent_app_country] => US [patent_app_date] => 2015-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 12220 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14877653 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/877653
System on chip having semaphore function and method for implementing semaphore function Oct 6, 2015 Issued
Array ( [id] => 12352443 [patent_doc_number] => 09952990 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-24 [patent_title] => Implementing pseudo non-masking interrupts behavior using a priority interrupt controller [patent_app_type] => utility [patent_app_number] => 14/876845 [patent_app_country] => US [patent_app_date] => 2015-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5069 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14876845 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/876845
Implementing pseudo non-masking interrupts behavior using a priority interrupt controller Oct 6, 2015 Issued
Array ( [id] => 11556706 [patent_doc_number] => 20170102952 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-04-13 [patent_title] => 'ACCESSING DATA STORED IN A REMOTE TARGET USING A BASEBOARD MANAGEMENT CONTROLER (BMC) INDEPENDENTLY OF THE STATUS OF THE REMOTE TARGET\'S OPERATING SYSTEM (OS)' [patent_app_type] => utility [patent_app_number] => 14/876990 [patent_app_country] => US [patent_app_date] => 2015-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5470 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14876990 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/876990
ACCESSING DATA STORED IN A REMOTE TARGET USING A BASEBOARD MANAGEMENT CONTROLER (BMC) INDEPENDENTLY OF THE STATUS OF THE REMOTE TARGET'S OPERATING SYSTEM (OS) Oct 6, 2015 Abandoned
Array ( [id] => 11544085 [patent_doc_number] => 20170097910 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-04-06 [patent_title] => 'DIRECT MEMORY ACCESS FOR PROGRAMMABLE LOGIC DEVICE CONFIGURATION' [patent_app_type] => utility [patent_app_number] => 14/876467 [patent_app_country] => US [patent_app_date] => 2015-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5437 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14876467 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/876467
Direct memory access for programmable logic device configuration Oct 5, 2015 Issued
Array ( [id] => 12895471 [patent_doc_number] => 20180190332 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-05 [patent_title] => EFFICIENT MEMORY ACTIVATION AT RUNTIME [patent_app_type] => utility [patent_app_number] => 15/755469 [patent_app_country] => US [patent_app_date] => 2015-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7019 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15755469 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/755469
Efficient memory activation at runtime Sep 24, 2015 Issued
Array ( [id] => 10739571 [patent_doc_number] => 20160085722 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-24 [patent_title] => 'DATA PACKET PROCESSING' [patent_app_type] => utility [patent_app_number] => 14/862599 [patent_app_country] => US [patent_app_date] => 2015-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8538 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14862599 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/862599
Data packet processing Sep 22, 2015 Issued
Array ( [id] => 13157831 [patent_doc_number] => 10095641 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-09 [patent_title] => Processor with frames/bins structure in local high speed memory [patent_app_type] => utility [patent_app_number] => 14/863032 [patent_app_country] => US [patent_app_date] => 2015-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 27 [patent_no_of_words] => 39746 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 403 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14863032 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/863032
Processor with frames/bins structure in local high speed memory Sep 22, 2015 Issued
Menu