Search

Michael Sun

Examiner (ID: 370)

Most Active Art Unit
2184
Art Unit(s)
2184, 2183
Total Applications
1044
Issued Applications
910
Pending Applications
47
Abandoned Applications
111

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19933579 [patent_doc_number] => 12306783 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-20 [patent_title] => Top level network and array level network for reconfigurable data processors [patent_app_type] => utility [patent_app_number] => 18/199361 [patent_app_country] => US [patent_app_date] => 2023-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 24 [patent_no_of_words] => 14457 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18199361 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/199361
Top level network and array level network for reconfigurable data processors May 17, 2023 Issued
Array ( [id] => 19212305 [patent_doc_number] => 12001367 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-04 [patent_title] => Multi-die integrated circuit with data processing engine array [patent_app_type] => utility [patent_app_number] => 18/320147 [patent_app_country] => US [patent_app_date] => 2023-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 22 [patent_no_of_words] => 22552 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18320147 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/320147
Multi-die integrated circuit with data processing engine array May 17, 2023 Issued
Array ( [id] => 19369823 [patent_doc_number] => 12061909 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-13 [patent_title] => Parallel slice processor having a recirculating load-store queue for fast deallocation of issue queue entries [patent_app_type] => utility [patent_app_number] => 18/312380 [patent_app_country] => US [patent_app_date] => 2023-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4726 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18312380 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/312380
Parallel slice processor having a recirculating load-store queue for fast deallocation of issue queue entries May 3, 2023 Issued
Array ( [id] => 19780533 [patent_doc_number] => 12229567 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-18 [patent_title] => Fault isolation in a director processor slice or board [patent_app_type] => utility [patent_app_number] => 18/142732 [patent_app_country] => US [patent_app_date] => 2023-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4530 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18142732 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/142732
Fault isolation in a director processor slice or board May 2, 2023 Issued
Array ( [id] => 19558591 [patent_doc_number] => 20240370383 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-07 [patent_title] => METHOD AND SYSTEM TO PERFORM COMPLIANCE AND AVAILABILITY CHECK FOR INTERNET SMALL COMPUTER SYSTEM INTERFACE (ISCSI) SERVICE IN DISTRIBUTED STORAGE SYSTEM [patent_app_type] => utility [patent_app_number] => 18/141995 [patent_app_country] => US [patent_app_date] => 2023-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5464 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18141995 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/141995
METHOD AND SYSTEM TO PERFORM COMPLIANCE AND AVAILABILITY CHECK FOR INTERNET SMALL COMPUTER SYSTEM INTERFACE (ISCSI) SERVICE IN DISTRIBUTED STORAGE SYSTEM Apr 30, 2023 Abandoned
Array ( [id] => 19499196 [patent_doc_number] => 20240338214 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-10 [patent_title] => PARALLEL COMPUTATION ON INPUT VECTORS BY ORTHOGONAL REPRESENTATION [patent_app_type] => utility [patent_app_number] => 18/131641 [patent_app_country] => US [patent_app_date] => 2023-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5091 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18131641 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/131641
PARALLEL COMPUTATION ON INPUT VECTORS BY ORTHOGONAL REPRESENTATION Apr 5, 2023 Pending
Array ( [id] => 19625634 [patent_doc_number] => 12164463 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-10 [patent_title] => Buffer splitting [patent_app_type] => utility [patent_app_number] => 18/130667 [patent_app_country] => US [patent_app_date] => 2023-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 18 [patent_no_of_words] => 12619 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18130667 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/130667
Buffer splitting Apr 3, 2023 Issued
Array ( [id] => 18810878 [patent_doc_number] => 20230385214 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => ENHANCED PERIPHERAL PROCESSING SYSTEM TO OPTIMIZE POWER CONSUMPTION [patent_app_type] => utility [patent_app_number] => 18/295180 [patent_app_country] => US [patent_app_date] => 2023-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8919 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18295180 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/295180
Enhanced peripheral processing system to optimize power consumption Apr 2, 2023 Issued
Array ( [id] => 19942472 [patent_doc_number] => 12314603 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-27 [patent_title] => Selective connection of controllers to a single-ported input/output device [patent_app_type] => utility [patent_app_number] => 18/194804 [patent_app_country] => US [patent_app_date] => 2023-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3256 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18194804 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/194804
Selective connection of controllers to a single-ported input/output device Apr 2, 2023 Issued
Array ( [id] => 19956410 [patent_doc_number] => 12326824 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-10 [patent_title] => Apparatus and methods for generating message signaled interrupts associated with peripheral components [patent_app_type] => utility [patent_app_number] => 18/191207 [patent_app_country] => US [patent_app_date] => 2023-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 2275 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18191207 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/191207
Apparatus and methods for generating message signaled interrupts associated with peripheral components Mar 27, 2023 Issued
Array ( [id] => 19475563 [patent_doc_number] => 12105653 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-01 [patent_title] => Systems, methods, and apparatus to enable data aggregation and adaptation in hardware acceleration subsystems [patent_app_type] => utility [patent_app_number] => 18/190242 [patent_app_country] => US [patent_app_date] => 2023-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 12983 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18190242 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/190242
Systems, methods, and apparatus to enable data aggregation and adaptation in hardware acceleration subsystems Mar 26, 2023 Issued
Array ( [id] => 19251000 [patent_doc_number] => 20240201990 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => Fused Data Generation and Associated Communication [patent_app_type] => utility [patent_app_number] => 18/190620 [patent_app_country] => US [patent_app_date] => 2023-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7921 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18190620 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/190620
Fused data generation and associated communication Mar 26, 2023 Issued
Array ( [id] => 18623027 [patent_doc_number] => 11756074 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-12 [patent_title] => Methods and systems to monitor a media device via a USB port [patent_app_type] => utility [patent_app_number] => 18/184994 [patent_app_country] => US [patent_app_date] => 2023-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10924 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18184994 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/184994
Methods and systems to monitor a media device via a USB port Mar 15, 2023 Issued
Array ( [id] => 20507208 [patent_doc_number] => 12541484 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-03 [patent_title] => Mainboard, processor board card and computing system [patent_app_type] => utility [patent_app_number] => 18/703359 [patent_app_country] => US [patent_app_date] => 2023-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 0 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18703359 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/703359
Mainboard, processor board card and computing system Mar 15, 2023 Issued
Array ( [id] => 19899156 [patent_doc_number] => 12277077 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-04-15 [patent_title] => Software-decoupling-based hardware control apparatus and method [patent_app_type] => utility [patent_app_number] => 18/261542 [patent_app_country] => US [patent_app_date] => 2023-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 0 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18261542 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/261542
Software-decoupling-based hardware control apparatus and method Mar 14, 2023 Issued
Array ( [id] => 18694767 [patent_doc_number] => 20230325184 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-12 [patent_title] => Artificial Intelligence Chip, Accelerator and Operation Method [patent_app_type] => utility [patent_app_number] => 18/183178 [patent_app_country] => US [patent_app_date] => 2023-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10676 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18183178 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/183178
Artificial intelligence chip, accelerator and operation method Mar 13, 2023 Issued
Array ( [id] => 18881331 [patent_doc_number] => 20240004700 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => TASK PROCESSING METHOD AND DEVICE [patent_app_type] => utility [patent_app_number] => 18/121513 [patent_app_country] => US [patent_app_date] => 2023-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9806 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18121513 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/121513
Task processing method and device Mar 13, 2023 Issued
Array ( [id] => 18499211 [patent_doc_number] => 20230221955 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-13 [patent_title] => VECTOR BIT TRANSPOSE [patent_app_type] => utility [patent_app_number] => 18/183218 [patent_app_country] => US [patent_app_date] => 2023-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9801 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18183218 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/183218
VECTOR BIT TRANSPOSE Mar 13, 2023 Pending
Array ( [id] => 18486913 [patent_doc_number] => 20230214259 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-06 [patent_title] => SYSTEMS AND METHODS FOR I/O COMMAND SCHEDULING BASED ON MULTIPLE RESOURCE PARAMETERS [patent_app_type] => utility [patent_app_number] => 18/119601 [patent_app_country] => US [patent_app_date] => 2023-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9024 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18119601 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/119601
Systems and methods for I/O command scheduling based on multiple resource parameters Mar 8, 2023 Issued
Array ( [id] => 18795973 [patent_doc_number] => 11829764 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-28 [patent_title] => Address manipulation using indices and tags [patent_app_type] => utility [patent_app_number] => 18/118580 [patent_app_country] => US [patent_app_date] => 2023-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 12470 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18118580 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/118580
Address manipulation using indices and tags Mar 6, 2023 Issued
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