Search

Michael Thanh Tran

Examiner (ID: 2981, Phone: (571)272-1795 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2827, 2511, 2818
Total Applications
3089
Issued Applications
2919
Pending Applications
108
Abandoned Applications
104

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7059860 [patent_doc_number] => 20050002220 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-06 [patent_title] => 'Apparatus for flexible deactivation of word lines of dynamic memory modules and method therefor' [patent_app_type] => utility [patent_app_number] => 10/834416 [patent_app_country] => US [patent_app_date] => 2004-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3133 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20050002220.pdf [firstpage_image] =>[orig_patent_app_number] => 10834416 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/834416
Apparatus for flexible deactivation of word lines of dynamic memory modules and method therefor Apr 28, 2004 Issued
Array ( [id] => 7196228 [patent_doc_number] => 20050041491 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-24 [patent_title] => 'Repair apparatus and method for semiconductor memory device to be selectively programmed for wafer-level test or post package test' [patent_app_type] => utility [patent_app_number] => 10/834490 [patent_app_country] => US [patent_app_date] => 2004-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6924 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0041/20050041491.pdf [firstpage_image] =>[orig_patent_app_number] => 10834490 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/834490
Repair apparatus and method for semiconductor memory device to be selectively programmed for wafer-level test or post package test Apr 28, 2004 Issued
Array ( [id] => 7325195 [patent_doc_number] => 20040252540 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-16 [patent_title] => 'Method and apparatus for assessing one-time programmable cells' [patent_app_type] => new [patent_app_number] => 10/835091 [patent_app_country] => US [patent_app_date] => 2004-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1645 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0252/20040252540.pdf [firstpage_image] =>[orig_patent_app_number] => 10835091 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/835091
Method and apparatus for assessing one-time programmable cells Apr 27, 2004 Issued
Array ( [id] => 6924568 [patent_doc_number] => 20050237823 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-27 [patent_title] => 'Dynamically adaptable memory' [patent_app_type] => utility [patent_app_number] => 10/833388 [patent_app_country] => US [patent_app_date] => 2004-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2358 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0237/20050237823.pdf [firstpage_image] =>[orig_patent_app_number] => 10833388 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/833388
Dynamically adaptable memory Apr 26, 2004 Issued
Array ( [id] => 7044392 [patent_doc_number] => 20050248987 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-10 [patent_title] => 'OPERATION METHOD FOR NON-VOLATILE MEMORY' [patent_app_type] => utility [patent_app_number] => 10/829191 [patent_app_country] => US [patent_app_date] => 2004-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2687 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0248/20050248987.pdf [firstpage_image] =>[orig_patent_app_number] => 10829191 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/829191
Operation method for non-volatile memory Apr 21, 2004 Issued
Array ( [id] => 6950993 [patent_doc_number] => 20050226087 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-13 [patent_title] => 'Protocol structure to accelerate memory transmission' [patent_app_type] => utility [patent_app_number] => 10/822290 [patent_app_country] => US [patent_app_date] => 2004-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 581 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0226/20050226087.pdf [firstpage_image] =>[orig_patent_app_number] => 10822290 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/822290
Protocol structure to accelerate memory transmission Apr 11, 2004 Abandoned
Array ( [id] => 7126213 [patent_doc_number] => 20050057957 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-17 [patent_title] => 'Ferroelectric memory' [patent_app_type] => utility [patent_app_number] => 10/819192 [patent_app_country] => US [patent_app_date] => 2004-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 15995 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0057/20050057957.pdf [firstpage_image] =>[orig_patent_app_number] => 10819192 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/819192
Ferroelectric memory Apr 6, 2004 Issued
Array ( [id] => 791362 [patent_doc_number] => 06985388 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-10 [patent_title] => 'Dynamic column block selection' [patent_app_type] => utility [patent_app_number] => 10/818887 [patent_app_country] => US [patent_app_date] => 2004-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 7831 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/985/06985388.pdf [firstpage_image] =>[orig_patent_app_number] => 10818887 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/818887
Dynamic column block selection Apr 4, 2004 Issued
Array ( [id] => 745583 [patent_doc_number] => 07031199 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-04-18 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 10/815709 [patent_app_country] => US [patent_app_date] => 2004-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 28266 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/031/07031199.pdf [firstpage_image] =>[orig_patent_app_number] => 10815709 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/815709
Semiconductor memory device Apr 1, 2004 Issued
Array ( [id] => 7380044 [patent_doc_number] => 20040179399 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-16 [patent_title] => 'Clock synchronized nonvolatile memory device' [patent_app_type] => new [patent_app_number] => 10/810624 [patent_app_country] => US [patent_app_date] => 2004-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 14053 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0179/20040179399.pdf [firstpage_image] =>[orig_patent_app_number] => 10810624 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/810624
Clock synchronized nonvolatile memory device Mar 28, 2004 Issued
Array ( [id] => 7421215 [patent_doc_number] => 20040160836 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-19 [patent_title] => 'Semiconductor device with flexible redundancy system' [patent_app_type] => new [patent_app_number] => 10/810607 [patent_app_country] => US [patent_app_date] => 2004-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6409 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20040160836.pdf [firstpage_image] =>[orig_patent_app_number] => 10810607 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/810607
Semiconductor device with flexible redundancy system Mar 28, 2004 Issued
Array ( [id] => 1064775 [patent_doc_number] => 06850434 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-01 [patent_title] => 'Clock synchronized nonvolatile memory device' [patent_app_type] => utility [patent_app_number] => 10/810626 [patent_app_country] => US [patent_app_date] => 2004-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 23 [patent_no_of_words] => 13921 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/850/06850434.pdf [firstpage_image] =>[orig_patent_app_number] => 10810626 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/810626
Clock synchronized nonvolatile memory device Mar 28, 2004 Issued
Array ( [id] => 7380051 [patent_doc_number] => 20040179400 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-16 [patent_title] => 'Clock synchronized nonvolatile memory device' [patent_app_type] => new [patent_app_number] => 10/810631 [patent_app_country] => US [patent_app_date] => 2004-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 14031 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0179/20040179400.pdf [firstpage_image] =>[orig_patent_app_number] => 10810631 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/810631
Clock synchronized nonvolatile memory device Mar 28, 2004 Issued
Array ( [id] => 526006 [patent_doc_number] => 07193894 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-03-20 [patent_title] => 'Clock synchronized nonvolatile memory device' [patent_app_type] => utility [patent_app_number] => 10/810613 [patent_app_country] => US [patent_app_date] => 2004-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 23 [patent_no_of_words] => 13942 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/193/07193894.pdf [firstpage_image] =>[orig_patent_app_number] => 10810613 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/810613
Clock synchronized nonvolatile memory device Mar 28, 2004 Issued
Array ( [id] => 682507 [patent_doc_number] => 07085169 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-01 [patent_title] => 'Flash memory device capable of reducing read time' [patent_app_type] => utility [patent_app_number] => 10/813909 [patent_app_country] => US [patent_app_date] => 2004-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4839 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/085/07085169.pdf [firstpage_image] =>[orig_patent_app_number] => 10813909 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/813909
Flash memory device capable of reducing read time Mar 25, 2004 Issued
Array ( [id] => 7146360 [patent_doc_number] => 20040170058 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-02 [patent_title] => 'Reducing the effects of noise in non-volatile memories through multiple reads' [patent_app_type] => new [patent_app_number] => 10/799416 [patent_app_country] => US [patent_app_date] => 2004-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7565 [patent_no_of_claims] => 63 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0170/20040170058.pdf [firstpage_image] =>[orig_patent_app_number] => 10799416 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/799416
Reducing the effects of noise in non-volatile memories through multiple reads Mar 11, 2004 Issued
Array ( [id] => 503210 [patent_doc_number] => 07209380 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-24 [patent_title] => 'Magnetic memory device and method of reading the same' [patent_app_type] => utility [patent_app_number] => 10/547508 [patent_app_country] => US [patent_app_date] => 2004-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 33 [patent_no_of_words] => 23539 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/209/07209380.pdf [firstpage_image] =>[orig_patent_app_number] => 10547508 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/547508
Magnetic memory device and method of reading the same Mar 11, 2004 Issued
Array ( [id] => 7398300 [patent_doc_number] => 20040174743 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-09 [patent_title] => 'Clock synchronized nonvolatile memory device' [patent_app_type] => new [patent_app_number] => 10/797012 [patent_app_country] => US [patent_app_date] => 2004-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 14025 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20040174743.pdf [firstpage_image] =>[orig_patent_app_number] => 10797012 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/797012
Clock synchronized nonvolatile memory device Mar 10, 2004 Issued
Array ( [id] => 517344 [patent_doc_number] => 07200057 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-03 [patent_title] => 'Test for weak SRAM cells' [patent_app_type] => utility [patent_app_number] => 10/548340 [patent_app_country] => US [patent_app_date] => 2004-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 3878 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/200/07200057.pdf [firstpage_image] =>[orig_patent_app_number] => 10548340 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/548340
Test for weak SRAM cells Mar 2, 2004 Issued
Array ( [id] => 547382 [patent_doc_number] => 07177189 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-02-13 [patent_title] => 'Memory defect detection and self-repair technique' [patent_app_type] => utility [patent_app_number] => 10/791188 [patent_app_country] => US [patent_app_date] => 2004-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2986 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/177/07177189.pdf [firstpage_image] =>[orig_patent_app_number] => 10791188 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/791188
Memory defect detection and self-repair technique Feb 29, 2004 Issued
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