Michael Thanh Tran

Array ( [id] => 942190 [patent_doc_number] => 06970368 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-11-29 [patent_title] => 'CAM (content addressable memory) cells as part of core array in flash memory device' [patent_app_type] => utility [patent_app_number] => 10/650049 [patent_app_country] => US [patent_app_date] => 2003-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 18 [patent_no_of_words] => 7806 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/970/06970368.pdf [firstpage_image] =>[orig_patent_app_number] => 10650049 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7463700 [patent_doc_number] => 20040120204 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-24 [patent_title] => 'Non-volatile semiconductor storage device performing ROM read operation upon power-on' [patent_app_type] => new [patent_app_number] => 10/648853 [patent_app_country] => US [patent_app_date] => 2003-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 11954 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0120/20040120204.pdf [firstpage_image] =>[orig_patent_app_number] => 10648853 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7331175 [patent_doc_number] => 20040130962 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-08 [patent_title] => 'Delayed locked loop implementation in a synchronous dynamic random access memory' [patent_app_type] => new [patent_app_number] => 10/645330 [patent_app_country] => US [patent_app_date] => 2003-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2321 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0130/20040130962.pdf [firstpage_image] =>[orig_patent_app_number] => 10645330 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7454376 [patent_doc_number] => 20040052121 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-18 [patent_title] => 'Flash cell fuse circuit' [patent_app_type] => new [patent_app_number] => 10/642961 [patent_app_country] => US [patent_app_date] => 2003-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6869 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20040052121.pdf [firstpage_image] =>[orig_patent_app_number] => 10642961 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7386214 [patent_doc_number] => 20040037131 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-26 [patent_title] => 'Flash cell fuse circuit' [patent_app_type] => new [patent_app_number] => 10/642959 [patent_app_country] => US [patent_app_date] => 2003-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6868 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0037/20040037131.pdf [firstpage_image] =>[orig_patent_app_number] => 10642959 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6970650 [patent_doc_number] => 20050036360 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-17 [patent_title] => 'Apparatus turning on word line decoder by reference bit line equalization' [patent_app_type] => utility [patent_app_number] => 10/640388 [patent_app_country] => US [patent_app_date] => 2003-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2538 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0036/20050036360.pdf [firstpage_image] =>[orig_patent_app_number] => 10640388 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7374819 [patent_doc_number] => 20040027896 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-12 [patent_title] => 'Semiconductor memory device' [patent_app_type] => new [patent_app_number] => 10/637549 [patent_app_country] => US [patent_app_date] => 2003-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 5231 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0027/20040027896.pdf [firstpage_image] =>[orig_patent_app_number] => 10637549 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7311267 [patent_doc_number] => 20040032784 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-19 [patent_title] => 'Apparatus for reducing bleed currents within a DRAM array having row-to-column shorts' [patent_app_type] => new [patent_app_number] => 10/639122 [patent_app_country] => US [patent_app_date] => 2003-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2434 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0032/20040032784.pdf [firstpage_image] =>[orig_patent_app_number] => 10639122 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 980463 [patent_doc_number] => 06930953 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-16 [patent_title] => 'Self-timed strobe generator and method for use with multi-strobe random access memories to increase memory bandwidth' [patent_app_type] => utility [patent_app_number] => 10/634589 [patent_app_country] => US [patent_app_date] => 2003-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3095 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/930/06930953.pdf [firstpage_image] =>[orig_patent_app_number] => 10634589 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 478670 [patent_doc_number] => 07227803 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-06-05 [patent_title] => 'Apparatus for reducing data corruption in a non-volatile memory' [patent_app_type] => utility [patent_app_number] => 10/633264 [patent_app_country] => US [patent_app_date] => 2003-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4168 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/227/07227803.pdf [firstpage_image] =>[orig_patent_app_number] => 10633264 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7311247 [patent_doc_number] => 20040032768 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-19 [patent_title] => 'Semiconductor memory' [patent_app_type] => new [patent_app_number] => 10/629588 [patent_app_country] => US [patent_app_date] => 2003-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7932 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0032/20040032768.pdf [firstpage_image] =>[orig_patent_app_number] => 10629588 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7302440 [patent_doc_number] => 20040114417 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-17 [patent_title] => 'Ferroelectric memory device comprising extended memory unit' [patent_app_type] => new [patent_app_number] => 10/628488 [patent_app_country] => US [patent_app_date] => 2003-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 6137 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0114/20040114417.pdf [firstpage_image] =>[orig_patent_app_number] => 10628488 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 573090 [patent_doc_number] => 07158425 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-01-02 [patent_title] => 'System and method for providing a redundant memory array in a semiconductor memory integrated circuit' [patent_app_type] => utility [patent_app_number] => 10/628896 [patent_app_country] => US [patent_app_date] => 2003-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4623 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/158/07158425.pdf [firstpage_image] =>[orig_patent_app_number] => 10628896 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1016148 [patent_doc_number] => 06894940 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-17 [patent_title] => 'Semiconductor memory device having a sub-amplifier configuration' [patent_app_type] => utility [patent_app_number] => 10/625588 [patent_app_country] => US [patent_app_date] => 2003-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 5395 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 326 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/894/06894940.pdf [firstpage_image] =>[orig_patent_app_number] => 10625588 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1003645 [patent_doc_number] => 06909624 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-06-21 [patent_title] => 'Semiconductor memory device and test method thereof' [patent_app_type] => utility [patent_app_number] => 10/624890 [patent_app_country] => US [patent_app_date] => 2003-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5110 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/909/06909624.pdf [firstpage_image] =>[orig_patent_app_number] => 10624890 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7287861 [patent_doc_number] => 20040109344 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-10 [patent_title] => 'Semiconductor memory device' [patent_app_type] => new [patent_app_number] => 10/623691 [patent_app_country] => US [patent_app_date] => 2003-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7941 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 14 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20040109344.pdf [firstpage_image] =>[orig_patent_app_number] => 10623691 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1019808 [patent_doc_number] => 06891748 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-10 [patent_title] => 'MRAM having memory cell array in which cross-point memory cells are arranged by hierarchical bit line scheme and data read method thereof' [patent_app_type] => utility [patent_app_number] => 10/621886 [patent_app_country] => US [patent_app_date] => 2003-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 7271 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/891/06891748.pdf [firstpage_image] =>[orig_patent_app_number] => 10621886 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7459544 [patent_doc_number] => 20040100843 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-27 [patent_title] => 'Semiconductor memory device for reducing noise in operation of sense amplifier' [patent_app_type] => new [patent_app_number] => 10/623289 [patent_app_country] => US [patent_app_date] => 2003-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6104 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0100/20040100843.pdf [firstpage_image] =>[orig_patent_app_number] => 10623289 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 997888 [patent_doc_number] => 06914851 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-07-05 [patent_title] => 'Circuit element with timing control' [patent_app_type] => utility [patent_app_number] => 10/620092 [patent_app_country] => US [patent_app_date] => 2003-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3668 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/914/06914851.pdf [firstpage_image] =>[orig_patent_app_number] => 10620092 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1023681 [patent_doc_number] => 06888770 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-03 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 10/617391 [patent_app_country] => US [patent_app_date] => 2003-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 22 [patent_no_of_words] => 7950 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/888/06888770.pdf [firstpage_image] =>[orig_patent_app_number] => 10617391 [rel_patent_id] =>[rel_patent_doc_number] =>)