Michael Thanh Tran

Array ( [id] => 6833660 [patent_doc_number] => 20030161205 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-28 [patent_title] => 'Non-volatile memory with test rows for disturb detection' [patent_app_type] => new [patent_app_number] => 10/367014 [patent_app_country] => US [patent_app_date] => 2003-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4393 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0161/20030161205.pdf [firstpage_image] =>[orig_patent_app_number] => 10367014 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6663054 [patent_doc_number] => 20030202380 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-30 [patent_title] => 'Band-gap voltage reference' [patent_app_type] => new [patent_app_number] => 10/365586 [patent_app_country] => US [patent_app_date] => 2003-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6459 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0202/20030202380.pdf [firstpage_image] =>[orig_patent_app_number] => 10365586 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1122871 [patent_doc_number] => 06798696 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-28 [patent_title] => 'Method of controlling the operation of non-volatile semiconductor memory chips' [patent_app_type] => B2 [patent_app_number] => 10/364417 [patent_app_country] => US [patent_app_date] => 2003-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 57 [patent_figures_cnt] => 59 [patent_no_of_words] => 18070 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/798/06798696.pdf [firstpage_image] =>[orig_patent_app_number] => 10364417 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7102621 [patent_doc_number] => 20050105347 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-19 [patent_title] => 'Magnetic storage unit using ferromagnetic tunnel junction element' [patent_app_type] => utility [patent_app_number] => 10/503658 [patent_app_country] => US [patent_app_date] => 2003-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6448 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0105/20050105347.pdf [firstpage_image] =>[orig_patent_app_number] => 10503658 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7225423 [patent_doc_number] => 20040156241 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-12 [patent_title] => 'System and method for programming cells in non-volatile integrated memory devices' [patent_app_type] => new [patent_app_number] => 10/359993 [patent_app_country] => US [patent_app_date] => 2003-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8869 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0156/20040156241.pdf [firstpage_image] =>[orig_patent_app_number] => 10359993 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6855103 [patent_doc_number] => 20030128604 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-10 [patent_title] => 'Nonvolatile semiconductor memory and read method' [patent_app_type] => new [patent_app_number] => 10/357477 [patent_app_country] => US [patent_app_date] => 2003-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 13938 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20030128604.pdf [firstpage_image] =>[orig_patent_app_number] => 10357477 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1149423 [patent_doc_number] => 06778439 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-08-17 [patent_title] => 'Nonvolatile semiconductor memory device with MONOS type memory cell' [patent_app_type] => B2 [patent_app_number] => 10/357490 [patent_app_country] => US [patent_app_date] => 2003-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 7537 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 278 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/778/06778439.pdf [firstpage_image] =>[orig_patent_app_number] => 10357490 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 793854 [patent_doc_number] => 06982901 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-01-03 [patent_title] => 'Memory device and method of use' [patent_app_type] => utility [patent_app_number] => 10/355788 [patent_app_country] => US [patent_app_date] => 2003-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2995 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/982/06982901.pdf [firstpage_image] =>[orig_patent_app_number] => 10355788 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1074604 [patent_doc_number] => 06839272 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-01-04 [patent_title] => 'Thin film magnetic memory device conducting read operation and write operation in parallel' [patent_app_type] => utility [patent_app_number] => 10/353986 [patent_app_country] => US [patent_app_date] => 2003-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 26 [patent_no_of_words] => 15460 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/839/06839272.pdf [firstpage_image] =>[orig_patent_app_number] => 10353986 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1074618 [patent_doc_number] => 06839286 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-01-04 [patent_title] => 'Semiconductor device with programmable impedance control circuit' [patent_app_type] => utility [patent_app_number] => 10/353990 [patent_app_country] => US [patent_app_date] => 2003-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 5217 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/839/06839286.pdf [firstpage_image] =>[orig_patent_app_number] => 10353990 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7392651 [patent_doc_number] => 20040017720 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-29 [patent_title] => 'Semiconductor memory' [patent_app_type] => new [patent_app_number] => 10/350191 [patent_app_country] => US [patent_app_date] => 2003-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 13007 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0017/20040017720.pdf [firstpage_image] =>[orig_patent_app_number] => 10350191 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6695736 [patent_doc_number] => 20030107930 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-12 [patent_title] => 'Semiconductor device with flexible redundancy system' [patent_app_type] => new [patent_app_number] => 10/348965 [patent_app_country] => US [patent_app_date] => 2003-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6372 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0107/20030107930.pdf [firstpage_image] =>[orig_patent_app_number] => 10348965 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1249651 [patent_doc_number] => 06674675 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-01-06 [patent_title] => 'Semiconductor device with flexible redundancy system' [patent_app_type] => B2 [patent_app_number] => 10/348964 [patent_app_country] => US [patent_app_date] => 2003-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 6316 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/674/06674675.pdf [firstpage_image] =>[orig_patent_app_number] => 10348964 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6786644 [patent_doc_number] => 20030137883 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-24 [patent_title] => 'Half power supply voltage generator and semiconductor memory device using the same' [patent_app_type] => new [patent_app_number] => 10/349386 [patent_app_country] => US [patent_app_date] => 2003-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3970 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0137/20030137883.pdf [firstpage_image] =>[orig_patent_app_number] => 10349386 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6695750 [patent_doc_number] => 20030107944 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-12 [patent_title] => 'Delayed locked loop implementation in a synchronous dynamic random access memory' [patent_app_type] => new [patent_app_number] => 10/348062 [patent_app_country] => US [patent_app_date] => 2003-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2461 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0107/20030107944.pdf [firstpage_image] =>[orig_patent_app_number] => 10348062 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1016097 [patent_doc_number] => 06894917 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-17 [patent_title] => 'DRAM refresh scheme with flexible frequency for active and standby mode' [patent_app_type] => utility [patent_app_number] => 10/346588 [patent_app_country] => US [patent_app_date] => 2003-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2171 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/894/06894917.pdf [firstpage_image] =>[orig_patent_app_number] => 10346588 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1087622 [patent_doc_number] => 06831855 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-12-14 [patent_title] => 'Magnetic memory' [patent_app_type] => B2 [patent_app_number] => 10/345188 [patent_app_country] => US [patent_app_date] => 2003-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 40 [patent_no_of_words] => 8124 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/831/06831855.pdf [firstpage_image] =>[orig_patent_app_number] => 10345188 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6850324 [patent_doc_number] => 20030142526 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-31 [patent_title] => 'Semiconductor integrated circuit device' [patent_app_type] => new [patent_app_number] => 10/345186 [patent_app_country] => US [patent_app_date] => 2003-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7107 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0142/20030142526.pdf [firstpage_image] =>[orig_patent_app_number] => 10345186 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1285212 [patent_doc_number] => 06646906 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-11-11 [patent_title] => 'Methods of reading ferroelectric memory cells' [patent_app_type] => B2 [patent_app_number] => 10/341071 [patent_app_country] => US [patent_app_date] => 2003-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 8321 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/646/06646906.pdf [firstpage_image] =>[orig_patent_app_number] => 10341071 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 614183 [patent_doc_number] => 07149138 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-12-12 [patent_title] => 'Increasing a refresh period in a semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 10/500922 [patent_app_country] => US [patent_app_date] => 2003-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 3917 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/149/07149138.pdf [firstpage_image] =>[orig_patent_app_number] => 10500922 [rel_patent_id] =>[rel_patent_doc_number] =>)