Search

Michael Thanh Tran

Examiner (ID: 149, Phone: (571)272-1795 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2827, 2511, 2818
Total Applications
3177
Issued Applications
2960
Pending Applications
145
Abandoned Applications
104

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20242678 [patent_doc_number] => 12422996 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-23 [patent_title] => Controller for controlling one-time programmable memory, system, and operation method thereof [patent_app_type] => utility [patent_app_number] => 18/045753 [patent_app_country] => US [patent_app_date] => 2022-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4672 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18045753 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/045753
Controller for controlling one-time programmable memory, system, and operation method thereof Oct 10, 2022 Issued
Array ( [id] => 18170534 [patent_doc_number] => 20230037145 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-02 [patent_title] => MEMORY WITH PROGRAMMABLE DIE REFRESH STAGGER [patent_app_type] => utility [patent_app_number] => 17/962188 [patent_app_country] => US [patent_app_date] => 2022-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10392 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17962188 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/962188
Memory with programmable die refresh stagger Oct 6, 2022 Issued
Array ( [id] => 18365425 [patent_doc_number] => 20230147016 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-11 [patent_title] => APPARATUS, MEMORY DEVICE, AND METHOD FOR MULTI-PHASE CLOCK TRAINING [patent_app_type] => utility [patent_app_number] => 17/959663 [patent_app_country] => US [patent_app_date] => 2022-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10986 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17959663 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/959663
Apparatus, memory device, and method for multi-phase clock training Oct 3, 2022 Issued
Array ( [id] => 19582372 [patent_doc_number] => 12148498 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-19 [patent_title] => Post package repair management [patent_app_type] => utility [patent_app_number] => 17/959191 [patent_app_country] => US [patent_app_date] => 2022-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5980 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17959191 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/959191
Post package repair management Oct 2, 2022 Issued
Array ( [id] => 19062895 [patent_doc_number] => 11942140 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-26 [patent_title] => Nonvolatile memory devices [patent_app_type] => utility [patent_app_number] => 17/958386 [patent_app_country] => US [patent_app_date] => 2022-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 30 [patent_no_of_words] => 20985 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 327 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17958386 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/958386
Nonvolatile memory devices Sep 30, 2022 Issued
Array ( [id] => 18280655 [patent_doc_number] => 20230096127 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => RESISTIVE RANDOM-ACCESS MEMORY (RERAM) CELL OPTIMIZED FOR RESET AND SET CURRENTS [patent_app_type] => utility [patent_app_number] => 17/937186 [patent_app_country] => US [patent_app_date] => 2022-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4721 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17937186 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/937186
Resistive random-access memory (ReRAM) cell optimized for reset and set currents Sep 29, 2022 Issued
Array ( [id] => 18935237 [patent_doc_number] => 11887675 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-30 [patent_title] => Random telegraph signal noise reduction scheme for semiconductor memories [patent_app_type] => utility [patent_app_number] => 17/936445 [patent_app_country] => US [patent_app_date] => 2022-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 22 [patent_no_of_words] => 9050 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17936445 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/936445
Random telegraph signal noise reduction scheme for semiconductor memories Sep 28, 2022 Issued
Array ( [id] => 19070822 [patent_doc_number] => 20240105248 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-28 [patent_title] => TCAM WITH HYSTERETIC OXIDE MEMORY CELLS [patent_app_type] => utility [patent_app_number] => 17/955194 [patent_app_country] => US [patent_app_date] => 2022-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10340 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17955194 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/955194
TCAM WITH HYSTERETIC OXIDE MEMORY CELLS Sep 27, 2022 Pending
Array ( [id] => 19720124 [patent_doc_number] => 12205667 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-21 [patent_title] => Multi-die package [patent_app_type] => utility [patent_app_number] => 17/954343 [patent_app_country] => US [patent_app_date] => 2022-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2401 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 272 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17954343 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/954343
Multi-die package Sep 27, 2022 Issued
Array ( [id] => 19507631 [patent_doc_number] => 12119060 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-15 [patent_title] => Content-addressable memory and electronic device including the same [patent_app_type] => utility [patent_app_number] => 17/953491 [patent_app_country] => US [patent_app_date] => 2022-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7783 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17953491 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/953491
Content-addressable memory and electronic device including the same Sep 26, 2022 Issued
Array ( [id] => 19413664 [patent_doc_number] => 12079482 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-03 [patent_title] => Memory device [patent_app_type] => utility [patent_app_number] => 17/934691 [patent_app_country] => US [patent_app_date] => 2022-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 18 [patent_no_of_words] => 9044 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17934691 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/934691
Memory device Sep 22, 2022 Issued
Array ( [id] => 18144454 [patent_doc_number] => 20230018305 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => NONVOLATILE MEMORY DEVICE AND METHOD OF OPERATING A NONVOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 17/947320 [patent_app_country] => US [patent_app_date] => 2022-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15071 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 293 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17947320 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/947320
Nonvolatile memory device and method of operating a nonvolatile memory Sep 18, 2022 Issued
Array ( [id] => 18652803 [patent_doc_number] => 20230298643 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-21 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/944725 [patent_app_country] => US [patent_app_date] => 2022-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15354 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 287 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17944725 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/944725
Semiconductor device Sep 13, 2022 Issued
Array ( [id] => 18279598 [patent_doc_number] => 20230095070 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => DETERMINATION OF A RESULTANT DATA WORD WHEN ACCESSING A MEMORY [patent_app_type] => utility [patent_app_number] => 17/943536 [patent_app_country] => US [patent_app_date] => 2022-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8796 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17943536 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/943536
Determination of a resultant data word when accessing a memory Sep 12, 2022 Issued
Array ( [id] => 19244313 [patent_doc_number] => 12014764 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-18 [patent_title] => Memory device including row hammer preventing circuitry and an operating method of the memory device [patent_app_type] => utility [patent_app_number] => 17/939327 [patent_app_country] => US [patent_app_date] => 2022-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 7053 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17939327 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/939327
Memory device including row hammer preventing circuitry and an operating method of the memory device Sep 6, 2022 Issued
Array ( [id] => 18655242 [patent_doc_number] => 20230301093 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-21 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/899962 [patent_app_country] => US [patent_app_date] => 2022-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10100 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17899962 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/899962
Semiconductor device Aug 30, 2022 Issued
Array ( [id] => 19123382 [patent_doc_number] => 11967376 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-23 [patent_title] => Distinct chip identifier sequence utilizing unclonable characteristics of resistive memory on a chip [patent_app_type] => utility [patent_app_number] => 17/899356 [patent_app_country] => US [patent_app_date] => 2022-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 31 [patent_no_of_words] => 23371 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17899356 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/899356
Distinct chip identifier sequence utilizing unclonable characteristics of resistive memory on a chip Aug 29, 2022 Issued
Array ( [id] => 19459968 [patent_doc_number] => 12100470 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-24 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 17/897074 [patent_app_country] => US [patent_app_date] => 2022-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 31 [patent_no_of_words] => 22220 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17897074 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/897074
Semiconductor memory device Aug 25, 2022 Issued
Array ( [id] => 19531494 [patent_doc_number] => 20240355396 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-24 [patent_title] => FLASH MEMORY CELL, WRITING METHOD AND ERASING METHOD THEREFOR [patent_app_type] => utility [patent_app_number] => 18/686598 [patent_app_country] => US [patent_app_date] => 2022-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19363 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18686598 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/686598
FLASH MEMORY CELL, WRITING METHOD AND ERASING METHOD THEREFOR Aug 24, 2022 Issued
Array ( [id] => 19007352 [patent_doc_number] => 20240071423 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => STRUCTURES FOR WORD LINE MULTIPLEXING IN THREE-DIMENSIONAL MEMORY ARRAYS [patent_app_type] => utility [patent_app_number] => 17/893681 [patent_app_country] => US [patent_app_date] => 2022-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15756 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17893681 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/893681
Structures for word line multiplexing in three-dimensional memory arrays Aug 22, 2022 Issued
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