
Michael Thanh Tran
Examiner (ID: 149, Phone: (571)272-1795 , Office: P/2827 )
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2827, 2511, 2818 |
| Total Applications | 3177 |
| Issued Applications | 2960 |
| Pending Applications | 145 |
| Abandoned Applications | 104 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 18068403
[patent_doc_number] => 20220399491
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-12-15
[patent_title] => RESISTIVE MEMORY WITH VERTICAL TRANSPORT TRANSISTOR
[patent_app_type] => utility
[patent_app_number] => 17/346686
[patent_app_country] => US
[patent_app_date] => 2021-06-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4969
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17346686
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/346686 | Resistive memory with vertical transport transistor | Jun 13, 2021 | Issued |
Array
(
[id] => 17737726
[patent_doc_number] => 20220223188
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-07-14
[patent_title] => DATA OUTPUT APPARATUS AND SEMICONDUCTOR APPARATUS INCLUDING THE DATA OUTPUT APPARATUS
[patent_app_type] => utility
[patent_app_number] => 17/340777
[patent_app_country] => US
[patent_app_date] => 2021-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4970
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17340777
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/340777 | Data output apparatus and semiconductor apparatus including the data output apparatus | Jun 6, 2021 | Issued |
Array
(
[id] => 18304241
[patent_doc_number] => 11626153
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-04-11
[patent_title] => Low power static random-access memory
[patent_app_type] => utility
[patent_app_number] => 17/340783
[patent_app_country] => US
[patent_app_date] => 2021-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 4404
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17340783
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/340783 | Low power static random-access memory | Jun 6, 2021 | Issued |
Array
(
[id] => 18262932
[patent_doc_number] => 11610639
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-03-21
[patent_title] => Non-volatile memory device, storage device having the same, and reading method thereof
[patent_app_type] => utility
[patent_app_number] => 17/336378
[patent_app_country] => US
[patent_app_date] => 2021-06-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 23
[patent_no_of_words] => 13126
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17336378
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/336378 | Non-volatile memory device, storage device having the same, and reading method thereof | Jun 1, 2021 | Issued |
Array
(
[id] => 18190448
[patent_doc_number] => 11581049
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-02-14
[patent_title] => System and methods for programming nonvolatile memory having partial select gate drains
[patent_app_type] => utility
[patent_app_number] => 17/335909
[patent_app_country] => US
[patent_app_date] => 2021-06-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 17
[patent_no_of_words] => 13896
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 144
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17335909
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/335909 | System and methods for programming nonvolatile memory having partial select gate drains | May 31, 2021 | Issued |
Array
(
[id] => 18039713
[patent_doc_number] => 20220383930
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-12-01
[patent_title] => POWER SAVINGS MODE TOGGLING TO PREVENT BIAS TEMPERATURE INSTABILITY
[patent_app_type] => utility
[patent_app_number] => 17/333203
[patent_app_country] => US
[patent_app_date] => 2021-05-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7660
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 56
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17333203
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/333203 | Power savings mode toggling to prevent bias temperature instability | May 27, 2021 | Issued |
Array
(
[id] => 18155922
[patent_doc_number] => 11568911
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-01-31
[patent_title] => High-reliability magnetic memory system and method of operating the same
[patent_app_type] => utility
[patent_app_number] => 17/327930
[patent_app_country] => US
[patent_app_date] => 2021-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 10999
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17327930
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/327930 | High-reliability magnetic memory system and method of operating the same | May 23, 2021 | Issued |
Array
(
[id] => 19507626
[patent_doc_number] => 12119055
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-10-15
[patent_title] => Memory device architecture
[patent_app_type] => utility
[patent_app_number] => 17/329028
[patent_app_country] => US
[patent_app_date] => 2021-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 17
[patent_no_of_words] => 12640
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 187
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17329028
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/329028 | Memory device architecture | May 23, 2021 | Issued |
Array
(
[id] => 18580832
[patent_doc_number] => 11737381
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-08-22
[patent_title] => Resistive random access memory and method of forming the same
[patent_app_type] => utility
[patent_app_number] => 17/326353
[patent_app_country] => US
[patent_app_date] => 2021-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 3094
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 57
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17326353
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/326353 | Resistive random access memory and method of forming the same | May 20, 2021 | Issued |
Array
(
[id] => 17070397
[patent_doc_number] => 20210272614
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-09-02
[patent_title] => STORAGE DEVICE, ELECTRONIC COMPONENT, AND ELECTRONIC DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/326441
[patent_app_country] => US
[patent_app_date] => 2021-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15611
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 58
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17326441
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/326441 | Storage device, electronic component, and electronic device | May 20, 2021 | Issued |
Array
(
[id] => 18615540
[patent_doc_number] => 20230282277
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-09-07
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF CONTROLLING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/004715
[patent_app_country] => US
[patent_app_date] => 2021-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 23155
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 148
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18004715
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/004715 | Semiconductor device and method of controlling the same | May 19, 2021 | Issued |
Array
(
[id] => 17246816
[patent_doc_number] => 20210366561
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-11-25
[patent_title] => SEMICONDUCTOR DEVICE AND READING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/323699
[patent_app_country] => US
[patent_app_date] => 2021-05-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6231
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17323699
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/323699 | Semiconductor device and reading method thereof | May 17, 2021 | Issued |
Array
(
[id] => 18506250
[patent_doc_number] => 11704064
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-07-18
[patent_title] => Memory controller, storage device and memory system
[patent_app_type] => utility
[patent_app_number] => 17/321919
[patent_app_country] => US
[patent_app_date] => 2021-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 8948
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17321919
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/321919 | Memory controller, storage device and memory system | May 16, 2021 | Issued |
Array
(
[id] => 17908400
[patent_doc_number] => 11462260
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-10-04
[patent_title] => Nonvolatile memory devices
[patent_app_type] => utility
[patent_app_number] => 17/321393
[patent_app_country] => US
[patent_app_date] => 2021-05-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 30
[patent_no_of_words] => 20963
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 452
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17321393
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/321393 | Nonvolatile memory devices | May 13, 2021 | Issued |
Array
(
[id] => 18008221
[patent_doc_number] => 20220366988
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-17
[patent_title] => CONTENT-ADDRESSABLE MEMORY AND OPERATION METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/320336
[patent_app_country] => US
[patent_app_date] => 2021-05-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5061
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 65
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17320336
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/320336 | Content-addressable memory and operation method thereof | May 13, 2021 | Issued |
Array
(
[id] => 17402621
[patent_doc_number] => 20220044712
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-02-10
[patent_title] => SEMICONDUCTOR DEVICE AND READING METHOD
[patent_app_type] => utility
[patent_app_number] => 17/320224
[patent_app_country] => US
[patent_app_date] => 2021-05-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6742
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17320224
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/320224 | Semiconductor device and reading method | May 13, 2021 | Issued |
Array
(
[id] => 18175238
[patent_doc_number] => 11574957
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-02-07
[patent_title] => Three-dimensional memory array
[patent_app_type] => utility
[patent_app_number] => 17/320785
[patent_app_country] => US
[patent_app_date] => 2021-05-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 18
[patent_no_of_words] => 7844
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17320785
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/320785 | Three-dimensional memory array | May 13, 2021 | Issued |
Array
(
[id] => 17893058
[patent_doc_number] => 11456037
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-09-27
[patent_title] => Block read count voltage adjustment
[patent_app_type] => utility
[patent_app_number] => 17/318603
[patent_app_country] => US
[patent_app_date] => 2021-05-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 12864
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17318603
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/318603 | Block read count voltage adjustment | May 11, 2021 | Issued |
Array
(
[id] => 18047729
[patent_doc_number] => 11521687
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-12-06
[patent_title] => Semiconductor memory device
[patent_app_type] => utility
[patent_app_number] => 17/315079
[patent_app_country] => US
[patent_app_date] => 2021-05-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 30
[patent_no_of_words] => 15069
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 272
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17315079
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/315079 | Semiconductor memory device | May 6, 2021 | Issued |
Array
(
[id] => 17992945
[patent_doc_number] => 20220358982
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-10
[patent_title] => NON-VOLATILE MEMORY HAVING WRITE DETECT CIRCUITRY
[patent_app_type] => utility
[patent_app_number] => 17/302472
[patent_app_country] => US
[patent_app_date] => 2021-05-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6725
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17302472
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/302472 | Non-volatile memory having write detect circuitry | May 3, 2021 | Issued |