Search

Michael Thanh Tran

Examiner (ID: 149, Phone: (571)272-1795 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2827, 2511, 2818
Total Applications
3177
Issued Applications
2960
Pending Applications
145
Abandoned Applications
104

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19850382 [patent_doc_number] => 20250095733 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => STORAGE DEVICE AND METHOD OF CONTROLLING STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 18/830510 [patent_app_country] => US [patent_app_date] => 2024-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10656 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18830510 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/830510
STORAGE DEVICE AND METHOD OF CONTROLLING STORAGE DEVICE Sep 9, 2024 Pending
Array ( [id] => 19687706 [patent_doc_number] => 20250006251 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => SIGNAL ROUTING BETWEEN MEMORY DIE AND LOGIC DIE FOR MODE BASED OPERATIONS [patent_app_type] => utility [patent_app_number] => 18/829647 [patent_app_country] => US [patent_app_date] => 2024-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14070 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18829647 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/829647
SIGNAL ROUTING BETWEEN MEMORY DIE AND LOGIC DIE FOR MODE BASED OPERATIONS Sep 9, 2024 Pending
Array ( [id] => 19853194 [patent_doc_number] => 20250098545 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => MAGNETIC MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/829343 [patent_app_country] => US [patent_app_date] => 2024-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12167 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18829343 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/829343
MAGNETIC MEMORY DEVICE Sep 9, 2024 Issued
Array ( [id] => 20196563 [patent_doc_number] => 20250273273 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-28 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/829534 [patent_app_country] => US [patent_app_date] => 2024-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 24496 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18829534 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/829534
SEMICONDUCTOR MEMORY DEVICE Sep 9, 2024 Pending
Array ( [id] => 20570345 [patent_doc_number] => 20260064269 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-05 [patent_title] => MULTI-PLANE NONVOLATILE MEMORY WITH SERIAL ENCODER AND DECODER CIRCUITS [patent_app_type] => utility [patent_app_number] => 18/825452 [patent_app_country] => US [patent_app_date] => 2024-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4435 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18825452 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/825452
MULTI-PLANE NONVOLATILE MEMORY WITH SERIAL ENCODER AND DECODER CIRCUITS Sep 4, 2024 Pending
Array ( [id] => 20572061 [patent_doc_number] => 20260065989 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-05 [patent_title] => COUNTERMEASURE FOR DRAIN-SIDE SELECT GATE UPPER TAIL [patent_app_type] => utility [patent_app_number] => 18/825599 [patent_app_country] => US [patent_app_date] => 2024-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9402 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18825599 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/825599
COUNTERMEASURE FOR DRAIN-SIDE SELECT GATE UPPER TAIL Sep 4, 2024 Pending
Array ( [id] => 19646266 [patent_doc_number] => 20240420786 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-19 [patent_title] => ANALOG STORAGE USING MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/819191 [patent_app_country] => US [patent_app_date] => 2024-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19406 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18819191 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/819191
ANALOG STORAGE USING MEMORY DEVICE Aug 28, 2024 Pending
Array ( [id] => 20311769 [patent_doc_number] => 20250329398 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-23 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF OPERATING THE SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/818290 [patent_app_country] => US [patent_app_date] => 2024-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2460 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18818290 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/818290
SEMICONDUCTOR DEVICE AND METHOD OF OPERATING THE SEMICONDUCTOR DEVICE Aug 27, 2024 Pending
Array ( [id] => 20153146 [patent_doc_number] => 20250252984 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-07 [patent_title] => SEMICONDUCTOR MEMORY APPARATUS AND AN OPERATING METHOD OF THE SEMICONDUCTOR MEMORY APPARATUS [patent_app_type] => utility [patent_app_number] => 18/812600 [patent_app_country] => US [patent_app_date] => 2024-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8516 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18812600 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/812600
SEMICONDUCTOR MEMORY APPARATUS AND AN OPERATING METHOD OF THE SEMICONDUCTOR MEMORY APPARATUS Aug 21, 2024 Pending
Array ( [id] => 19634333 [patent_doc_number] => 20240412782 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-12 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/812006 [patent_app_country] => US [patent_app_date] => 2024-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15717 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 369 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18812006 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/812006
SEMICONDUCTOR MEMORY DEVICE Aug 21, 2024 Pending
Array ( [id] => 19634346 [patent_doc_number] => 20240412795 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-12 [patent_title] => TRACK CHARGE LOSS BASED ON SIGNAL AND NOISE CHARACTERISTICS OF MEMORY CELLS COLLECTED IN CALIBRATION OPERATIONS [patent_app_type] => utility [patent_app_number] => 18/808566 [patent_app_country] => US [patent_app_date] => 2024-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16207 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18808566 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/808566
TRACK CHARGE LOSS BASED ON SIGNAL AND NOISE CHARACTERISTICS OF MEMORY CELLS COLLECTED IN CALIBRATION OPERATIONS Aug 18, 2024 Pending
Array ( [id] => 20324380 [patent_doc_number] => 20250336468 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-30 [patent_title] => MEMORY DEVICE AND OPERATING METHOD THEREOF, MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 18/807523 [patent_app_country] => US [patent_app_date] => 2024-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12241 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18807523 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/807523
MEMORY DEVICE AND OPERATING METHOD THEREOF, MEMORY SYSTEM Aug 15, 2024 Pending
Array ( [id] => 20182143 [patent_doc_number] => 20250266101 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-21 [patent_title] => MEMORY DEVICE, MEMORY SYSTEM, MEMORY CONTROLLER, AND OPERATION METHOD [patent_app_type] => utility [patent_app_number] => 18/807452 [patent_app_country] => US [patent_app_date] => 2024-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 29590 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18807452 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/807452
MEMORY DEVICE, MEMORY SYSTEM, MEMORY CONTROLLER, AND OPERATION METHOD Aug 15, 2024 Pending
Array ( [id] => 19726913 [patent_doc_number] => 20250029664 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-23 [patent_title] => CIRCUIT AND METHOD FOR ON-CHIP LEAKAGE DETECTION AND COMPENSATION FOR MEMORIES [patent_app_type] => utility [patent_app_number] => 18/807793 [patent_app_country] => US [patent_app_date] => 2024-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7251 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18807793 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/807793
CIRCUIT AND METHOD FOR ON-CHIP LEAKAGE DETECTION AND COMPENSATION FOR MEMORIES Aug 15, 2024 Pending
Array ( [id] => 19618926 [patent_doc_number] => 20240404606 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-05 [patent_title] => IDENTIFY THE PROGRAMMING MODE OF MEMORY CELLS DURING READING OF THE MEMORY CELLS [patent_app_type] => utility [patent_app_number] => 18/803290 [patent_app_country] => US [patent_app_date] => 2024-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20841 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18803290 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/803290
IDENTIFY THE PROGRAMMING MODE OF MEMORY CELLS DURING READING OF THE MEMORY CELLS Aug 12, 2024 Pending
Array ( [id] => 20088555 [patent_doc_number] => 20250218491 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-03 [patent_title] => MEMORY DEVICES INCLUDING MECHANISM OF PROTECTING A VULNERABLE WORD LINE BASED ON THE PREVIOUS REFRESHED WORD LINES AND RELEVANT METHODS [patent_app_type] => utility [patent_app_number] => 18/796379 [patent_app_country] => US [patent_app_date] => 2024-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11353 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 263 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18796379 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/796379
Memory devices including mechanism of protecting a vulnerable word line based on the previous refreshed word lines and relevant methods Aug 6, 2024 Issued
Array ( [id] => 19820696 [patent_doc_number] => 20250078903 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-06 [patent_title] => DISCHARGING AN ACCESS DEVICE IN A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/790372 [patent_app_country] => US [patent_app_date] => 2024-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8494 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18790372 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/790372
DISCHARGING AN ACCESS DEVICE IN A MEMORY DEVICE Jul 30, 2024 Pending
Array ( [id] => 20514489 [patent_doc_number] => 20260038591 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-05 [patent_title] => FAST, AREA EFFICIENT WORDLINE DECODING SCHEME [patent_app_type] => utility [patent_app_number] => 18/790390 [patent_app_country] => US [patent_app_date] => 2024-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18790390 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/790390
FAST, AREA EFFICIENT WORDLINE DECODING SCHEME Jul 30, 2024 Pending
Array ( [id] => 19589388 [patent_doc_number] => 20240386945 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-21 [patent_title] => MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/789197 [patent_app_country] => US [patent_app_date] => 2024-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15703 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18789197 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/789197
MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME Jul 29, 2024 Pending
Array ( [id] => 20501676 [patent_doc_number] => 20260031138 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-29 [patent_title] => MULTI-LEVEL MEMORY CELL READ AND WRITEBACK SYSTEMS [patent_app_type] => utility [patent_app_number] => 18/787261 [patent_app_country] => US [patent_app_date] => 2024-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12135 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18787261 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/787261
MULTI-LEVEL MEMORY CELL READ AND WRITEBACK SYSTEMS Jul 28, 2024 Pending
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