Michael Thanh Tran

Array ( [id] => 17971100 [patent_doc_number] => 11488647 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-01 [patent_title] => Stacked magnetoresistive structures and methods therefor [patent_app_type] => utility [patent_app_number] => 17/255915 [patent_app_country] => US [patent_app_date] => 2019-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 66 [patent_no_of_words] => 22747 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17255915 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16543919 [patent_doc_number] => 20200410334 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-31 [patent_title] => BINARY WEIGHTED VOLTAGE ENCODING SCHEME FOR SUPPORTING MULTI-BIT INPUT PRECISION [patent_app_type] => utility [patent_app_number] => 16/452442 [patent_app_country] => US [patent_app_date] => 2019-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15027 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16452442 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16386241 [patent_doc_number] => 10811082 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-10-20 [patent_title] => Non-volatile memory with fast data cache transfer scheme [patent_app_type] => utility [patent_app_number] => 16/450058 [patent_app_country] => US [patent_app_date] => 2019-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 19 [patent_no_of_words] => 10653 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16450058 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16528487 [patent_doc_number] => 20200402568 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-24 [patent_title] => METHODS FOR ADJUSTING MEMORY DEVICE REFRESH RATES BASED ON MEMORY DEVICE TEMPERATURE, AND RELATED MEMORY DEVICES AND SYSTEMS [patent_app_type] => utility [patent_app_number] => 16/450198 [patent_app_country] => US [patent_app_date] => 2019-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9949 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16450198 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16447987 [patent_doc_number] => 10839918 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-11-17 [patent_title] => Boost converter in memory chip [patent_app_type] => utility [patent_app_number] => 16/449604 [patent_app_country] => US [patent_app_date] => 2019-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6237 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16449604 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16417626 [patent_doc_number] => 10825526 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-11-03 [patent_title] => Non-volatile memory with reduced data cache buffer [patent_app_type] => utility [patent_app_number] => 16/450042 [patent_app_country] => US [patent_app_date] => 2019-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 9579 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16450042 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16528476 [patent_doc_number] => 20200402557 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-24 [patent_title] => APPARATUSES AND METHODS FOR CONTROLLING WORD LINE DISCHARGE [patent_app_type] => utility [patent_app_number] => 16/450696 [patent_app_country] => US [patent_app_date] => 2019-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12192 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16450696 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15369285 [patent_doc_number] => 20200020407 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-16 [patent_title] => BLOCK READ COUNT VOLTAGE ADJUSTMENT [patent_app_type] => utility [patent_app_number] => 16/448502 [patent_app_country] => US [patent_app_date] => 2019-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12818 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16448502 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16186144 [patent_doc_number] => 10719477 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-07-21 [patent_title] => Methods and system for an integrated circuit [patent_app_type] => utility [patent_app_number] => 16/447008 [patent_app_country] => US [patent_app_date] => 2019-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4244 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16447008 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15872965 [patent_doc_number] => 20200143886 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-07 [patent_title] => MEMORY DEVICE, MEMORY SYSTEM INCLUDING THE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/445932 [patent_app_country] => US [patent_app_date] => 2019-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8983 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16445932 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16521455 [patent_doc_number] => 10872678 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-12-22 [patent_title] => Speculative section selection within a memory device [patent_app_type] => utility [patent_app_number] => 16/446467 [patent_app_country] => US [patent_app_date] => 2019-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 31209 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16446467 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16288499 [patent_doc_number] => 10765320 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-09-08 [patent_title] => Baselining user profiles from portable device information [patent_app_type] => utility [patent_app_number] => 16/445017 [patent_app_country] => US [patent_app_date] => 2019-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 16742 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16445017 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16356227 [patent_doc_number] => 10796744 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-06 [patent_title] => Cross-point memory cells, non-volatile memory arrays, methods of reading a memory cell, methods of programming a memory cell, methods of writing to and reading from a memory cell, and computer systems [patent_app_type] => utility [patent_app_number] => 16/438057 [patent_app_country] => US [patent_app_date] => 2019-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 8506 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16438057 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16372169 [patent_doc_number] => 10803935 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-13 [patent_title] => Conductive metal oxide structures in non-volatile re-writable memory devices [patent_app_type] => utility [patent_app_number] => 16/429411 [patent_app_country] => US [patent_app_date] => 2019-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 26 [patent_no_of_words] => 11706 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16429411 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17606891 [patent_doc_number] => 11335383 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-17 [patent_title] => Memory component for a system-on-chip device [patent_app_type] => utility [patent_app_number] => 16/624438 [patent_app_country] => US [patent_app_date] => 2019-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 21 [patent_no_of_words] => 18039 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16624438 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16609061 [patent_doc_number] => 10910074 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-02 [patent_title] => Memory controller and method of operating the same [patent_app_type] => utility [patent_app_number] => 16/426418 [patent_app_country] => US [patent_app_date] => 2019-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 22 [patent_no_of_words] => 16855 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16426418 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16280382 [patent_doc_number] => 10763425 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-09-01 [patent_title] => Magnetic tunnel junction based programmable memory cell [patent_app_type] => utility [patent_app_number] => 16/427074 [patent_app_country] => US [patent_app_date] => 2019-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 10002 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16427074 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16279908 [patent_doc_number] => 10762945 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-01 [patent_title] => Memory device and refresh method for PSRAM [patent_app_type] => utility [patent_app_number] => 16/424990 [patent_app_country] => US [patent_app_date] => 2019-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3967 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16424990 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15122943 [patent_doc_number] => 20190348105 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-14 [patent_title] => REDUCED SHIFTER MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 16/416187 [patent_app_country] => US [patent_app_date] => 2019-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4626 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16416187 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16047677 [patent_doc_number] => 10685717 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-16 [patent_title] => Erasing memory cells [patent_app_type] => utility [patent_app_number] => 16/411622 [patent_app_country] => US [patent_app_date] => 2019-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7088 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16411622 [rel_patent_id] =>[rel_patent_doc_number] =>)