Search

Michael Thanh Tran

Examiner (ID: 5527, Phone: (571)272-1795 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2827, 2511, 2818
Total Applications
3128
Issued Applications
2940
Pending Applications
121
Abandoned Applications
104

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18823053 [patent_doc_number] => 20230397394 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => METHOD FOR PRODUCING MEMORY DEVICE USING PILLAR-SHAPED SEMICONDUCTOR ELEMENTS [patent_app_type] => utility [patent_app_number] => 18/234996 [patent_app_country] => US [patent_app_date] => 2023-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12961 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18234996 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/234996
METHOD FOR PRODUCING MEMORY DEVICE USING PILLAR-SHAPED SEMICONDUCTOR ELEMENTS Aug 16, 2023 Pending
Array ( [id] => 19626838 [patent_doc_number] => 12165685 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-10 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 18/233349 [patent_app_country] => US [patent_app_date] => 2023-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 51 [patent_no_of_words] => 33294 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18233349 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/233349
Semiconductor device Aug 13, 2023 Issued
Array ( [id] => 18812658 [patent_doc_number] => 20230386995 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => STORAGE SYSTEM INCLUDING A DECOUPLING DEVICE HAVING A PLURALITY OF UNIT CAPACITORS [patent_app_type] => utility [patent_app_number] => 18/446959 [patent_app_country] => US [patent_app_date] => 2023-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7664 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18446959 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/446959
Storage system including a decoupling device having a plurality of unit capacitors Aug 8, 2023 Issued
Array ( [id] => 19704739 [patent_doc_number] => 12198785 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-01-14 [patent_title] => Semiconductor memory devices with dielectric fin structures [patent_app_type] => utility [patent_app_number] => 18/446062 [patent_app_country] => US [patent_app_date] => 2023-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 11334 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18446062 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/446062
Semiconductor memory devices with dielectric fin structures Aug 7, 2023 Issued
Array ( [id] => 20469218 [patent_doc_number] => 12525260 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-13 [patent_title] => Wordline sidewall contacts in 3D NAND structures [patent_app_type] => utility [patent_app_number] => 18/366903 [patent_app_country] => US [patent_app_date] => 2023-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 1239 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18366903 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/366903
Wordline sidewall contacts in 3D NAND structures Aug 7, 2023 Issued
Array ( [id] => 19633027 [patent_doc_number] => 20240411476 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-12 [patent_title] => AUTOMATIC BIT LINE VOLTAGE AND BIT LINE VOLTAGE TEMPERATURE COMPENSATION ADJUSTMENT FOR NON-VOLATILE MEMORY APPARATUS CURRENT CONSUMPTION REDUCTION [patent_app_type] => utility [patent_app_number] => 18/229782 [patent_app_country] => US [patent_app_date] => 2023-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14896 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18229782 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/229782
Automatic bit line voltage and bit line voltage temperature compensation adjustment for non-volatile memory apparatus current consumption reduction Aug 2, 2023 Issued
Array ( [id] => 19951082 [patent_doc_number] => 12322452 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-03 [patent_title] => Three-dimensional memory device including a bit-line-bias vertical transistor block and methods of operating the same [patent_app_type] => utility [patent_app_number] => 18/363518 [patent_app_country] => US [patent_app_date] => 2023-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 34 [patent_no_of_words] => 11268 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18363518 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/363518
Three-dimensional memory device including a bit-line-bias vertical transistor block and methods of operating the same Jul 31, 2023 Issued
Array ( [id] => 20203918 [patent_doc_number] => 12406701 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-02 [patent_title] => Memory component for a system-on-chip device [patent_app_type] => utility [patent_app_number] => 18/227727 [patent_app_country] => US [patent_app_date] => 2023-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 21 [patent_no_of_words] => 13031 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18227727 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/227727
Memory component for a system-on-chip device Jul 27, 2023 Issued
Array ( [id] => 19305232 [patent_doc_number] => 20240233812 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => MEMORY CELL ARRAY OF A STATIC RANDOM ACCESS MEMORY AND A STATIC RANDOM ACCESS MEMORY INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/227355 [patent_app_country] => US [patent_app_date] => 2023-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12475 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18227355 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/227355
Memory cell array of a static random access memory and a static random access memory including the same Jul 27, 2023 Issued
Array ( [id] => 20203918 [patent_doc_number] => 12406701 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-02 [patent_title] => Memory component for a system-on-chip device [patent_app_type] => utility [patent_app_number] => 18/227727 [patent_app_country] => US [patent_app_date] => 2023-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 21 [patent_no_of_words] => 13031 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18227727 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/227727
Memory component for a system-on-chip device Jul 27, 2023 Issued
Array ( [id] => 20203918 [patent_doc_number] => 12406701 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-02 [patent_title] => Memory component for a system-on-chip device [patent_app_type] => utility [patent_app_number] => 18/227727 [patent_app_country] => US [patent_app_date] => 2023-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 21 [patent_no_of_words] => 13031 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18227727 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/227727
Memory component for a system-on-chip device Jul 27, 2023 Issued
Array ( [id] => 20243948 [patent_doc_number] => 12424278 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-23 [patent_title] => Analog hardware realization of neural networks having variable weights [patent_app_type] => utility [patent_app_number] => 18/227901 [patent_app_country] => US [patent_app_date] => 2023-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 10922 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18227901 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/227901
Analog hardware realization of neural networks having variable weights Jul 27, 2023 Issued
Array ( [id] => 20203918 [patent_doc_number] => 12406701 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-02 [patent_title] => Memory component for a system-on-chip device [patent_app_type] => utility [patent_app_number] => 18/227727 [patent_app_country] => US [patent_app_date] => 2023-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 21 [patent_no_of_words] => 13031 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18227727 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/227727
Memory component for a system-on-chip device Jul 27, 2023 Issued
Array ( [id] => 20441294 [patent_doc_number] => 12512134 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-30 [patent_title] => Nonvolatile memory with ongoing program read [patent_app_type] => utility [patent_app_number] => 18/360273 [patent_app_country] => US [patent_app_date] => 2023-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 26 [patent_no_of_words] => 8516 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18360273 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/360273
Nonvolatile memory with ongoing program read Jul 26, 2023 Issued
Array ( [id] => 19660437 [patent_doc_number] => 20240427502 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-26 [patent_title] => DISTRIBUTED TEMPERATURE SENSING SCHEME TO SUPPRESS PEAK ICC IN NON-VOLATILE MEMORIES [patent_app_type] => utility [patent_app_number] => 18/359025 [patent_app_country] => US [patent_app_date] => 2023-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 24322 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18359025 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/359025
Distributed temperature sensing scheme to suppress peak Icc in non-volatile memories Jul 25, 2023 Issued
Array ( [id] => 18943140 [patent_doc_number] => 20240038279 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-01 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/359355 [patent_app_country] => US [patent_app_date] => 2023-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15515 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18359355 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/359355
Semiconductor memory device Jul 25, 2023 Issued
Array ( [id] => 20191154 [patent_doc_number] => 12402292 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-26 [patent_title] => Static random access memory with magnetic tunnel junction cells [patent_app_type] => utility [patent_app_number] => 18/358573 [patent_app_country] => US [patent_app_date] => 2023-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 4747 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18358573 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/358573
Static random access memory with magnetic tunnel junction cells Jul 24, 2023 Issued
Array ( [id] => 19022869 [patent_doc_number] => 20240079040 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-07 [patent_title] => MEMORY DEVICE INCLUDING THREE-DIMENSIONAL RACETRACK AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/225908 [patent_app_country] => US [patent_app_date] => 2023-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6697 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18225908 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/225908
Memory device including three-dimensional racetrack and operating method thereof Jul 24, 2023 Issued
Array ( [id] => 19544883 [patent_doc_number] => 20240361919 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => Interface circuit and memory controller [patent_app_type] => utility [patent_app_number] => 18/225670 [patent_app_country] => US [patent_app_date] => 2023-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15344 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 305 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18225670 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/225670
Interface circuit and memory controller Jul 23, 2023 Issued
Array ( [id] => 19481818 [patent_doc_number] => 20240329860 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => System and Method for Flexible Emergency Power Fail Management for Multiple Persistent Memory Regions [patent_app_type] => utility [patent_app_number] => 18/224835 [patent_app_country] => US [patent_app_date] => 2023-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5797 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18224835 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/224835
System and method for flexible emergency power fail management for multiple persistent memory regions Jul 20, 2023 Issued
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