Search

Michael Thanh Tran

Examiner (ID: 149, Phone: (571)272-1795 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2827, 2511, 2818
Total Applications
3177
Issued Applications
2960
Pending Applications
145
Abandoned Applications
104

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19679108 [patent_doc_number] => 12190979 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-07 [patent_title] => Dynamic random access memory built-in self-test power fail mitigation [patent_app_type] => utility [patent_app_number] => 18/373658 [patent_app_country] => US [patent_app_date] => 2023-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5525 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18373658 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/373658
Dynamic random access memory built-in self-test power fail mitigation Sep 26, 2023 Issued
Array ( [id] => 18900585 [patent_doc_number] => 20240016070 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-11 [patent_title] => MEMORY CELL, INTEGRATED CIRCUIT, AND MANUFACTURING METHOD OF MEMORY CELL [patent_app_type] => utility [patent_app_number] => 18/472161 [patent_app_country] => US [patent_app_date] => 2023-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9213 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18472161 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/472161
Memory cell, integrated circuit, and manufacturing method of memory cell Sep 20, 2023 Issued
Array ( [id] => 19434480 [patent_doc_number] => 20240302978 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-12 [patent_title] => MEMORY CONTROLLER AND MEMORY SYSTEM WITH DATA STROBE SIGNAL CALIBRATION CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/469394 [patent_app_country] => US [patent_app_date] => 2023-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7658 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18469394 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/469394
Memory controller and memory system with data strobe signal calibration circuit Sep 17, 2023 Issued
Array ( [id] => 20359945 [patent_doc_number] => 12475949 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-18 [patent_title] => Non-volatile memory with efficient precharge in sub-block mode [patent_app_type] => utility [patent_app_number] => 18/468349 [patent_app_country] => US [patent_app_date] => 2023-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 24 [patent_no_of_words] => 14241 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18468349 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/468349
Non-volatile memory with efficient precharge in sub-block mode Sep 14, 2023 Issued
Array ( [id] => 20080621 [patent_doc_number] => 12354696 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-08 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 18/463686 [patent_app_country] => US [patent_app_date] => 2023-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 76 [patent_figures_cnt] => 76 [patent_no_of_words] => 11034 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 272 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18463686 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/463686
Semiconductor memory device Sep 7, 2023 Issued
Array ( [id] => 19054420 [patent_doc_number] => 20240096389 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => NONVOLATILE SEMICONDUCTOR MEMORY AND MANUFACTURING METHOD THEREFOR [patent_app_type] => utility [patent_app_number] => 18/459962 [patent_app_country] => US [patent_app_date] => 2023-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10098 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18459962 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/459962
Nonvolatile semiconductor memory and manufacturing method therefor Aug 31, 2023 Issued
Array ( [id] => 20597929 [patent_doc_number] => 12581666 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-17 [patent_title] => Memory device based on thyristors [patent_app_type] => utility [patent_app_number] => 18/457412 [patent_app_country] => US [patent_app_date] => 2023-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 2244 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18457412 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/457412
Memory device based on thyristors Aug 28, 2023 Issued
Array ( [id] => 18823053 [patent_doc_number] => 20230397394 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => METHOD FOR PRODUCING MEMORY DEVICE USING PILLAR-SHAPED SEMICONDUCTOR ELEMENTS [patent_app_type] => utility [patent_app_number] => 18/234996 [patent_app_country] => US [patent_app_date] => 2023-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12961 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18234996 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/234996
METHOD FOR PRODUCING MEMORY DEVICE USING PILLAR-SHAPED SEMICONDUCTOR ELEMENTS Aug 16, 2023 Pending
Array ( [id] => 19626838 [patent_doc_number] => 12165685 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-10 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 18/233349 [patent_app_country] => US [patent_app_date] => 2023-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 51 [patent_no_of_words] => 33294 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18233349 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/233349
Semiconductor device Aug 13, 2023 Issued
Array ( [id] => 18812658 [patent_doc_number] => 20230386995 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => STORAGE SYSTEM INCLUDING A DECOUPLING DEVICE HAVING A PLURALITY OF UNIT CAPACITORS [patent_app_type] => utility [patent_app_number] => 18/446959 [patent_app_country] => US [patent_app_date] => 2023-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7664 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18446959 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/446959
Storage system including a decoupling device having a plurality of unit capacitors Aug 8, 2023 Issued
Array ( [id] => 20469218 [patent_doc_number] => 12525260 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-13 [patent_title] => Wordline sidewall contacts in 3D NAND structures [patent_app_type] => utility [patent_app_number] => 18/366903 [patent_app_country] => US [patent_app_date] => 2023-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 1239 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18366903 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/366903
Wordline sidewall contacts in 3D NAND structures Aug 7, 2023 Issued
Array ( [id] => 19704739 [patent_doc_number] => 12198785 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-01-14 [patent_title] => Semiconductor memory devices with dielectric fin structures [patent_app_type] => utility [patent_app_number] => 18/446062 [patent_app_country] => US [patent_app_date] => 2023-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 11334 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18446062 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/446062
Semiconductor memory devices with dielectric fin structures Aug 7, 2023 Issued
Array ( [id] => 19633027 [patent_doc_number] => 20240411476 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-12 [patent_title] => AUTOMATIC BIT LINE VOLTAGE AND BIT LINE VOLTAGE TEMPERATURE COMPENSATION ADJUSTMENT FOR NON-VOLATILE MEMORY APPARATUS CURRENT CONSUMPTION REDUCTION [patent_app_type] => utility [patent_app_number] => 18/229782 [patent_app_country] => US [patent_app_date] => 2023-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14896 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18229782 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/229782
Automatic bit line voltage and bit line voltage temperature compensation adjustment for non-volatile memory apparatus current consumption reduction Aug 2, 2023 Issued
Array ( [id] => 19951082 [patent_doc_number] => 12322452 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-03 [patent_title] => Three-dimensional memory device including a bit-line-bias vertical transistor block and methods of operating the same [patent_app_type] => utility [patent_app_number] => 18/363518 [patent_app_country] => US [patent_app_date] => 2023-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 34 [patent_no_of_words] => 11268 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18363518 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/363518
Three-dimensional memory device including a bit-line-bias vertical transistor block and methods of operating the same Jul 31, 2023 Issued
Array ( [id] => 20203918 [patent_doc_number] => 12406701 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-02 [patent_title] => Memory component for a system-on-chip device [patent_app_type] => utility [patent_app_number] => 18/227727 [patent_app_country] => US [patent_app_date] => 2023-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 21 [patent_no_of_words] => 13031 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18227727 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/227727
Memory component for a system-on-chip device Jul 27, 2023 Issued
Array ( [id] => 19305232 [patent_doc_number] => 20240233812 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => MEMORY CELL ARRAY OF A STATIC RANDOM ACCESS MEMORY AND A STATIC RANDOM ACCESS MEMORY INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/227355 [patent_app_country] => US [patent_app_date] => 2023-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12475 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18227355 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/227355
Memory cell array of a static random access memory and a static random access memory including the same Jul 27, 2023 Issued
Array ( [id] => 20203918 [patent_doc_number] => 12406701 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-02 [patent_title] => Memory component for a system-on-chip device [patent_app_type] => utility [patent_app_number] => 18/227727 [patent_app_country] => US [patent_app_date] => 2023-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 21 [patent_no_of_words] => 13031 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18227727 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/227727
Memory component for a system-on-chip device Jul 27, 2023 Issued
Array ( [id] => 20203918 [patent_doc_number] => 12406701 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-02 [patent_title] => Memory component for a system-on-chip device [patent_app_type] => utility [patent_app_number] => 18/227727 [patent_app_country] => US [patent_app_date] => 2023-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 21 [patent_no_of_words] => 13031 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18227727 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/227727
Memory component for a system-on-chip device Jul 27, 2023 Issued
Array ( [id] => 20243948 [patent_doc_number] => 12424278 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-23 [patent_title] => Analog hardware realization of neural networks having variable weights [patent_app_type] => utility [patent_app_number] => 18/227901 [patent_app_country] => US [patent_app_date] => 2023-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 10922 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18227901 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/227901
Analog hardware realization of neural networks having variable weights Jul 27, 2023 Issued
Array ( [id] => 20203918 [patent_doc_number] => 12406701 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-02 [patent_title] => Memory component for a system-on-chip device [patent_app_type] => utility [patent_app_number] => 18/227727 [patent_app_country] => US [patent_app_date] => 2023-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 21 [patent_no_of_words] => 13031 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18227727 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/227727
Memory component for a system-on-chip device Jul 27, 2023 Issued
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